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| author | Korey Sewell <ksewell@umich.edu> | 2006-07-07 15:58:22 -0400 |
|---|---|---|
| committer | Korey Sewell <ksewell@umich.edu> | 2006-07-07 15:58:22 -0400 |
| commit | 743737c28b4d29d2b6c1a80fc14e5bc6abcf6a60 (patch) | |
| tree | 898724a3714840ead898bd274c594566403fbf4d /src/mem/cache | |
| parent | 74d4d671386252d0d5f570b69fc63cb332757580 (diff) | |
| parent | 76c110d924d2adfa209ad4302af791dfe6f67946 (diff) | |
| download | gem5-743737c28b4d29d2b6c1a80fc14e5bc6abcf6a60.tar.xz | |
Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/newmem
into zizzer.eecs.umich.edu:/.automount/zooks/y/ksewell/research/m5-sim/newmem-o3
--HG--
extra : convert_revision : f97469b7d19c82deb3d068f80546d729757c25e3
Diffstat (limited to 'src/mem/cache')
| -rw-r--r-- | src/mem/cache/base_cache.cc | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/src/mem/cache/base_cache.cc b/src/mem/cache/base_cache.cc index 4fbda4074..b2caca765 100644 --- a/src/mem/cache/base_cache.cc +++ b/src/mem/cache/base_cache.cc @@ -144,7 +144,13 @@ BaseCache::getPort(const std::string &if_name, int idx) cpuSidePort = new CachePort(name() + "-cpu_side_port", this, true); return cpuSidePort; } - if (if_name == "functional") + else if (if_name == "functional") + { + if(cpuSidePort == NULL) + cpuSidePort = new CachePort(name() + "-cpu_side_port", this, true); + return cpuSidePort; + } + else if (if_name == "cpu_side") { if(cpuSidePort == NULL) cpuSidePort = new CachePort(name() + "-cpu_side_port", this, true); |