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author | Stephan Diestelhorst <stephan.diestelhorst@arm.com> | 2015-03-02 04:00:49 -0500 |
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committer | Stephan Diestelhorst <stephan.diestelhorst@arm.com> | 2015-03-02 04:00:49 -0500 |
commit | ecef1612b8a9a5632c8354ccb000184c2f82ddf3 (patch) | |
tree | c7c21dfc5aa15f3a552fbfb59e7474d1307e7934 /src/mem/cache | |
parent | d4ef8368aa1dfb5e1e1ebe155c0fce1070046f83 (diff) | |
download | gem5-ecef1612b8a9a5632c8354ccb000184c2f82ddf3.tar.xz |
mem: Add option to force in-order insertion in PacketQueue
By default, the packet queue is ordered by the ticks of the to-be-sent
packages. With the recent modifications of packages sinking their header time
when their resposne leaves the caches, there could be cases of MSHR targets
being allocated and ordered A, B, but their responses being sent out in the
order B,A. This led to inconsistencies in bus traffic, in particular the snoop
filter observing first a ReadExResp and later a ReadRespWithInv. Logically,
these were ordered the other way around behind the MSHR, but due to the timing
adjustments when inserting into the PacketQueue, they were sent out in the
wrong order on the bus, confusing the snoop filter.
This patch adds a flag (off by default) such that these special cases can
request in-order insertion into the packet queue, which might offset timing
slighty. This is expected to occur rarely and not affect timing results.
Diffstat (limited to 'src/mem/cache')
-rw-r--r-- | src/mem/cache/cache_impl.hh | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/src/mem/cache/cache_impl.hh b/src/mem/cache/cache_impl.hh index 73b23d637..ec438bc50 100644 --- a/src/mem/cache/cache_impl.hh +++ b/src/mem/cache/cache_impl.hh @@ -1596,15 +1596,16 @@ doTimingSupplyResponse(PacketPtr req_pkt, const uint8_t *blk_data, // invalidate it. pkt->cmd = MemCmd::ReadRespWithInvalidate; } - DPRINTF(Cache, "%s created response: %s address %x size %d\n", - __func__, pkt->cmdString(), pkt->getAddr(), pkt->getSize()); - // Here we condiser forward_time, paying for just forward latency and + // Here we consider forward_time, paying for just forward latency and // also charging the delay provided by the xbar. // forward_time is used as send_time in next allocateWriteBuffer(). Tick forward_time = clockEdge(forwardLatency) + pkt->headerDelay; // Here we reset the timing of the packet. pkt->headerDelay = pkt->payloadDelay = 0; - memSidePort->schedTimingSnoopResp(pkt, forward_time); + DPRINTF(Cache, "%s created response: %s address %x size %d tick: %lu\n", + __func__, pkt->cmdString(), pkt->getAddr(), pkt->getSize(), + forward_time); + memSidePort->schedTimingSnoopResp(pkt, forward_time, true); } template<class TagStore> |