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authorAndreas Hansson <andreas.hansson@arm.com>2013-06-27 05:49:50 -0400
committerAndreas Hansson <andreas.hansson@arm.com>2013-06-27 05:49:50 -0400
commit0d68d36b9d12c36e6201fa8bc4bec34258c04eab (patch)
tree66d9dc41b12a0bfafa80c8a7801f6b5d5725cdb6 /src/mem/cache
parenta0e551869c53d8fd0c8e3969521a2c732ad762b3 (diff)
downloadgem5-0d68d36b9d12c36e6201fa8bc4bec34258c04eab.tar.xz
mem: Remove the cache builder
This patch removes the redundant cache builder class.
Diffstat (limited to 'src/mem/cache')
-rw-r--r--src/mem/cache/SConscript1
-rw-r--r--src/mem/cache/base.cc17
-rw-r--r--src/mem/cache/builder.cc98
-rw-r--r--src/mem/cache/cache.cc16
4 files changed, 18 insertions, 114 deletions
diff --git a/src/mem/cache/SConscript b/src/mem/cache/SConscript
index e7b0dca0c..8323602d2 100644
--- a/src/mem/cache/SConscript
+++ b/src/mem/cache/SConscript
@@ -38,7 +38,6 @@ SimObject('BaseCache.py')
Source('base.cc')
Source('cache.cc')
Source('blk.cc')
-Source('builder.cc')
Source('mshr.cc')
Source('mshr_queue.cc')
diff --git a/src/mem/cache/base.cc b/src/mem/cache/base.cc
index 85265b61e..ba981b606 100644
--- a/src/mem/cache/base.cc
+++ b/src/mem/cache/base.cc
@@ -49,7 +49,10 @@
#include "cpu/smt.hh"
#include "debug/Cache.hh"
#include "debug/Drain.hh"
+#include "mem/cache/tags/fa_lru.hh"
+#include "mem/cache/tags/lru.hh"
#include "mem/cache/base.hh"
+#include "mem/cache/cache.hh"
#include "mem/cache/mshr.hh"
#include "sim/full_system.hh"
@@ -766,3 +769,17 @@ BaseCache::drain(DrainManager *dm)
setDrainState(Drainable::Drained);
return 0;
}
+
+BaseCache *
+BaseCacheParams::create()
+{
+ int numSets = size / (assoc * block_size);
+
+ if (numSets == 1) {
+ FALRU *tags = new FALRU(block_size, size, hit_latency);
+ return new Cache<FALRU>(this, tags);
+ } else {
+ LRU *tags = new LRU(numSets, block_size, assoc, hit_latency);
+ return new Cache<LRU>(this, tags);
+ }
+}
diff --git a/src/mem/cache/builder.cc b/src/mem/cache/builder.cc
deleted file mode 100644
index 7de8fbf9d..000000000
--- a/src/mem/cache/builder.cc
+++ /dev/null
@@ -1,98 +0,0 @@
-/*
- * Copyright (c) 2003-2005 The Regents of The University of Michigan
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * Authors: Erik Hallnor
- * Nathan Binkert
- */
-
-/**
- * @file
- * Simobject instatiation of caches.
- */
-#include <list>
-#include <vector>
-
-#include "config/the_isa.hh"
-#include "mem/cache/base.hh"
-#include "mem/cache/cache.hh"
-#include "mem/config/cache.hh"
-#include "params/BaseCache.hh"
-
-// Tag Templates
-#if defined(USE_CACHE_LRU)
-#include "mem/cache/tags/lru.hh"
-#endif
-
-#if defined(USE_CACHE_FALRU)
-#include "mem/cache/tags/fa_lru.hh"
-#endif
-
-
-using namespace std;
-
-#define BUILD_CACHE(TAGS, tags) \
- do { \
- Cache<TAGS> *retval = \
- new Cache<TAGS>(this, tags); \
- return retval; \
- } while (0)
-
-#define BUILD_CACHE_PANIC(x) do { \
- panic("%s not compiled into M5", x); \
- } while (0)
-
-#if defined(USE_CACHE_FALRU)
-#define BUILD_FALRU_CACHE do { \
- FALRU *tags = new FALRU(block_size, size, hit_latency); \
- BUILD_CACHE(FALRU, tags); \
- } while (0)
-#else
-#define BUILD_FALRU_CACHE BUILD_CACHE_PANIC("falru cache")
-#endif
-
-#if defined(USE_CACHE_LRU)
-#define BUILD_LRU_CACHE do { \
- LRU *tags = new LRU(numSets, block_size, assoc, hit_latency); \
- BUILD_CACHE(LRU, tags); \
- } while (0)
-#else
-#define BUILD_LRU_CACHE BUILD_CACHE_PANIC("lru cache")
-#endif
-
-BaseCache *
-BaseCacheParams::create()
-{
- int numSets = size / (assoc * block_size);
-
- if (numSets == 1) {
- BUILD_FALRU_CACHE;
- } else {
- BUILD_LRU_CACHE;
- }
-
- return NULL;
-}
diff --git a/src/mem/cache/cache.cc b/src/mem/cache/cache.cc
index 6a0669e06..d59a0d44b 100644
--- a/src/mem/cache/cache.cc
+++ b/src/mem/cache/cache.cc
@@ -36,28 +36,14 @@
* Cache template instantiations.
*/
-#include "mem/config/cache.hh"
-
-#if defined(USE_CACHE_LRU)
-#include "mem/cache/tags/lru.hh"
-#endif
-
-#if defined(USE_CACHE_FALRU)
#include "mem/cache/tags/fa_lru.hh"
-#endif
-
+#include "mem/cache/tags/lru.hh"
#include "mem/cache/cache_impl.hh"
// Template Instantiations
#ifndef DOXYGEN_SHOULD_SKIP_THIS
-
-#if defined(USE_CACHE_FALRU)
template class Cache<FALRU>;
-#endif
-
-#if defined(USE_CACHE_LRU)
template class Cache<LRU>;
-#endif
#endif //DOXYGEN_SHOULD_SKIP_THIS