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| author | Andreas Hansson <andreas.hansson@arm.com> | 2012-09-07 12:34:38 -0400 |
|---|---|---|
| committer | Andreas Hansson <andreas.hansson@arm.com> | 2012-09-07 12:34:38 -0400 |
| commit | 287ea1a081c5dd3213069755dbbd3d7bf736bacc (patch) | |
| tree | e48487569786a562138445d746354b610cf5011f /src/mem/cache | |
| parent | 4124ea09f8e2f6934fe746ff7c244dba7230cac9 (diff) | |
| download | gem5-287ea1a081c5dd3213069755dbbd3d7bf736bacc.tar.xz | |
Param: Transition to Cycles for relevant parameters
This patch is a first step to using Cycles as a parameter type. The
main affected modules are the CPUs and the Ruby caches. There are
definitely plenty more places that are affected, but this patch serves
as a starting point to making the transition.
An important part of this patch is to actually enable parameters to be
specified as Param.Cycles which involves some changes to params.py.
Diffstat (limited to 'src/mem/cache')
| -rw-r--r-- | src/mem/cache/BaseCache.py | 2 | ||||
| -rw-r--r-- | src/mem/cache/tags/iic.cc | 2 | ||||
| -rw-r--r-- | src/mem/cache/tags/iic.hh | 2 |
3 files changed, 4 insertions, 2 deletions
diff --git a/src/mem/cache/BaseCache.py b/src/mem/cache/BaseCache.py index 83b3c70c2..081a0f15e 100644 --- a/src/mem/cache/BaseCache.py +++ b/src/mem/cache/BaseCache.py @@ -37,7 +37,7 @@ class BaseCache(MemObject): assoc = Param.Int("associativity") block_size = Param.Int("block size in bytes") latency = Param.Latency("Latency") - hash_delay = Param.Int(1, "time in cycles of hash access") + hash_delay = Param.Cycles(1, "time in cycles of hash access") max_miss_count = Param.Counter(0, "number of misses to handle before calling exit") mshrs = Param.Int("number of MSHRs (max outstanding requests)") diff --git a/src/mem/cache/tags/iic.cc b/src/mem/cache/tags/iic.cc index d6ddf04a6..3fdc11e80 100644 --- a/src/mem/cache/tags/iic.cc +++ b/src/mem/cache/tags/iic.cc @@ -250,6 +250,8 @@ IIC::accessBlock(Addr addr, int &lat, int context_src) } } + // @todo: is hashDelay is really cycles, then + // multiply with period set_lat = set_lat * hashDelay + hitLatency; if (tag_ptr != NULL) { // IIC replacement: if this is not the first element of diff --git a/src/mem/cache/tags/iic.hh b/src/mem/cache/tags/iic.hh index 0c3ea7a13..fd63daff7 100644 --- a/src/mem/cache/tags/iic.hh +++ b/src/mem/cache/tags/iic.hh @@ -196,7 +196,7 @@ class IIC : public BaseTags const unsigned subMask; /** The latency of a hash lookup. */ - const unsigned hashDelay; + const Cycles hashDelay; /** The total number of tags in primary and secondary. */ const unsigned numTags; /** The number of tags in the secondary tag store. */ |