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authorSteve Reinhardt <stever@eecs.umich.edu>2007-07-14 11:48:30 -0700
committerSteve Reinhardt <stever@eecs.umich.edu>2007-07-14 11:48:30 -0700
commit7cd6c7ee05b45b578fe20077bce53dd95dd5e7b4 (patch)
tree43fb8d802b8146b41e6878bb65a879be733664d1 /src/mem/cache
parent92bb9242fb14db7ce3f78572ea428c8b3c06798a (diff)
downloadgem5-7cd6c7ee05b45b578fe20077bce53dd95dd5e7b4.tar.xz
Fix & tweak DPRINTFs for tracediff w/new cache code.
Note that we should *not* print pointer values in DPRINTFs as these needlessly clutter tracediff output. --HG-- extra : convert_revision : 25a448f1b3ac8d453a717a104ad6dc0112fb30bb
Diffstat (limited to 'src/mem/cache')
-rw-r--r--src/mem/cache/base_cache.cc4
-rw-r--r--src/mem/cache/cache_impl.hh36
2 files changed, 20 insertions, 20 deletions
diff --git a/src/mem/cache/base_cache.cc b/src/mem/cache/base_cache.cc
index 8aac02460..84373aa9b 100644
--- a/src/mem/cache/base_cache.cc
+++ b/src/mem/cache/base_cache.cc
@@ -162,7 +162,7 @@ BaseCache::CachePort::recvRetry()
mshr->pkt = copyPkt;
bool success = sendTiming(pkt);
- DPRINTF(Cache, "Address %x was %s in sending the timing request\n",
+ DPRINTF(CachePort, "Address %x was %s in sending the timing request\n",
pkt->getAddr(), success ? "succesful" : "unsuccesful");
waitingOnRetry = !success;
@@ -272,7 +272,7 @@ BaseCache::RequestEvent::process()
mshr->pkt = copyPkt;
bool success = cachePort->sendTiming(pkt);
- DPRINTF(Cache, "Address %x was %s in sending the timing request\n",
+ DPRINTF(CachePort, "Address %x was %s in sending the timing request\n",
pkt->getAddr(), success ? "succesful" : "unsuccesful");
cachePort->waitingOnRetry = !success;
diff --git a/src/mem/cache/cache_impl.hh b/src/mem/cache/cache_impl.hh
index 9b094c1e3..4cd5ab004 100644
--- a/src/mem/cache/cache_impl.hh
+++ b/src/mem/cache/cache_impl.hh
@@ -631,8 +631,10 @@ Cache<TagStore,Coherence>::access(PacketPtr &pkt)
delete wbPkt;
}
- DPRINTF(Cache, "%s %x %s\n", pkt->cmdString(), pkt->getAddr(),
- (blk) ? "hit" : "miss");
+ if (!pkt->req->isUncacheable()) {
+ DPRINTF(Cache, "%s %x %s\n", pkt->cmdString(), pkt->getAddr(),
+ (blk) ? "hit" : "miss");
+ }
if (blk) {
// Hit
@@ -713,14 +715,14 @@ Cache<TagStore,Coherence>::sendResult(PacketPtr &pkt, MSHR* mshr,
BlkType *blk = tags->findBlock(pkt->getAddr());
CacheBlk::State old_state = (blk) ? blk->status : 0;
CacheBlk::State new_state = coherence->getNewState(pkt,old_state);
- if (old_state != new_state)
- DPRINTF(Cache, "Block for blk addr %x moving from state "
- "%i to %i\n", pkt->getAddr(), old_state, new_state);
//Set the state on the upgrade
std::memcpy(pkt->getPtr<uint8_t>(), blk->data, blkSize);
PacketList writebacks;
handleFill(blk, mshr, new_state, writebacks, pkt);
assert(writebacks.empty());
+ if (old_state != new_state)
+ DPRINTF(Cache, "Block addr %x moving from state "
+ "%i to %i\n", pkt->getAddr(), old_state, new_state);
missQueue->handleResponse(pkt, curTick + hitLatency);
}
} else if (pkt && !pkt->req->isUncacheable()) {
@@ -756,7 +758,7 @@ Cache<TagStore,Coherence>::handleResponse(PacketPtr &pkt)
//Make the response a Bad address and send it
}
// MemDebug::cacheResponse(pkt);
- DPRINTF(Cache, "Handling reponse to %x\n", pkt->getAddr());
+ DPRINTF(Cache, "Handling response to %x\n", pkt->getAddr());
if (pkt->isCacheFill() && !pkt->isNoAllocate()) {
DPRINTF(Cache, "Block for addr %x being updated in Cache\n",
@@ -765,13 +767,11 @@ Cache<TagStore,Coherence>::handleResponse(PacketPtr &pkt)
CacheBlk::State old_state = (blk) ? blk->status : 0;
PacketList writebacks;
CacheBlk::State new_state = coherence->getNewState(pkt,old_state);
- if (old_state != new_state)
- DPRINTF(Cache, "Block for blk addr %x moving from "
- "state %i to %i\n",
- pkt->getAddr(),
- old_state, new_state);
blk = handleFill(blk, (MSHR*)pkt->senderState,
new_state, writebacks, pkt);
+ if (old_state != new_state)
+ DPRINTF(Cache, "Block addr %x moving from state %i to %i\n",
+ pkt->getAddr(), old_state, new_state);
while (!writebacks.empty()) {
PacketPtr wbPkt = writebacks.front();
missQueue->doWriteback(wbPkt);
@@ -919,7 +919,7 @@ Cache<TagStore,Coherence>::snoop(PacketPtr &pkt)
}
if (satisfy) {
- DPRINTF(Cache, "Cache snooped a %s request for addr %x and "
+ DPRINTF(Cache, "snooped a %s request for addr %x and "
"now supplying data, new state is %i\n",
pkt->cmdString(), blk_addr, new_state);
@@ -928,7 +928,7 @@ Cache<TagStore,Coherence>::snoop(PacketPtr &pkt)
return;
}
if (blk)
- DPRINTF(Cache, "Cache snooped a %s request for addr %x, "
+ DPRINTF(Cache, "snooped a %s request for addr %x, "
"new state is %i\n", pkt->cmdString(), blk_addr, new_state);
handleSnoop(blk, new_state);
@@ -1070,11 +1070,11 @@ return 0;
coherence->getNewState(busPkt, old_state);
DPRINTF(Cache, "Receive response: %s for addr %x in state %i\n",
busPkt->cmdString(), busPkt->getAddr(), old_state);
- if (old_state != new_state)
- DPRINTF(Cache, "Block for blk addr %x moving from state "
- "%i to %i\n", busPkt->getAddr(), old_state, new_state);
handleFill(blk, busPkt, new_state, writebacks, pkt);
+ if (old_state != new_state)
+ DPRINTF(Cache, "Block addr %x moving from state "
+ "%i to %i\n", busPkt->getAddr(), old_state, new_state);
//Free the packet
delete busPkt;
@@ -1127,8 +1127,8 @@ Cache<TagStore,Coherence>::snoopProbe(PacketPtr &pkt)
CacheBlk::State new_state = 0;
bool satisfy = coherence->handleBusRequest(pkt,blk,mshr, new_state);
if (satisfy) {
- DPRINTF(Cache, "Cache snooped a %s request for addr %x and "
- "now supplying data, new state is %i\n",
+ DPRINTF(Cache, "Cache snooped a %s request for addr %x, "
+ "supplying data, new state is %i\n",
pkt->cmdString(), blk_addr, new_state);
handleSnoop(blk, new_state, pkt);