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authorKevin Lim <ktlim@umich.edu>2006-10-31 13:59:30 -0500
committerKevin Lim <ktlim@umich.edu>2006-10-31 13:59:30 -0500
commitb26355daa87c7a86a96a90b2002bc5684741288c (patch)
tree2e2a0782c5fda7f1129a24a33c509003edd43ba0 /src/mem/cache
parenteda7148af25e8e106e8983fb37952263dcae5275 (diff)
downloadgem5-b26355daa87c7a86a96a90b2002bc5684741288c.tar.xz
Ports now have a pointer to the MemObject that owns it (can be NULL).
src/cpu/simple/atomic.hh: Port now takes in the MemObject that owns it. src/cpu/simple/timing.hh: Port now takes in MemObject that owns it. src/dev/io_device.cc: src/mem/bus.hh: Ports now take in the MemObject that owns it. src/mem/cache/base_cache.cc: Ports now take in the MemObject that own it. src/mem/port.hh: src/mem/tport.hh: Ports now optionally take in the MemObject that owns it. --HG-- extra : convert_revision : 890a72a871795987c2236c65937e06973412d349
Diffstat (limited to 'src/mem/cache')
-rw-r--r--src/mem/cache/base_cache.cc2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mem/cache/base_cache.cc b/src/mem/cache/base_cache.cc
index 599958222..47d40a490 100644
--- a/src/mem/cache/base_cache.cc
+++ b/src/mem/cache/base_cache.cc
@@ -42,7 +42,7 @@ using namespace std;
BaseCache::CachePort::CachePort(const std::string &_name, BaseCache *_cache,
bool _isCpuSide)
- : Port(_name), cache(_cache), isCpuSide(_isCpuSide)
+ : Port(_name, _cache), cache(_cache), isCpuSide(_isCpuSide)
{
blocked = false;
waitingOnRetry = false;