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authorAndreas Hansson <andreas.hansson@arm.com>2012-01-17 12:55:09 -0600
committerAndreas Hansson <andreas.hansson@arm.com>2012-01-17 12:55:09 -0600
commit07cf9d914b292008ead7021182ec2ef8fc4671f1 (patch)
treef99ab26383bcdde2f8761af1e75a431d7a84c634 /src/mem/cache
parent142380a373e28cd61b79d348361ec1ed4ed330e5 (diff)
downloadgem5-07cf9d914b292008ead7021182ec2ef8fc4671f1.tar.xz
MEM: Separate queries for snooping and address ranges
This patch simplifies the address-range determination mechanism and also unifies the naming across ports and devices. It further splits the queries for determining if a port is snooping and what address ranges it responds to (aiming towards a separation of cache-maintenance ports and pure memory-mapped ports). Default behaviours are such that most ports do not have to define isSnooping, and master ports need not implement getAddrRanges.
Diffstat (limited to 'src/mem/cache')
-rw-r--r--src/mem/cache/base.cc8
-rw-r--r--src/mem/cache/base.hh2
-rw-r--r--src/mem/cache/cache.hh6
-rw-r--r--src/mem/cache/cache_impl.hh16
4 files changed, 14 insertions, 18 deletions
diff --git a/src/mem/cache/base.cc b/src/mem/cache/base.cc
index 023b74323..278329152 100644
--- a/src/mem/cache/base.cc
+++ b/src/mem/cache/base.cc
@@ -70,11 +70,9 @@ BaseCache::BaseCache(const Params *p)
}
void
-BaseCache::CachePort::recvStatusChange(Port::Status status)
+BaseCache::CachePort::recvRangeChange() const
{
- if (status == Port::RangeChange) {
- otherPort->sendStatusChange(Port::RangeChange);
- }
+ otherPort->sendRangeChange();
}
@@ -136,7 +134,7 @@ BaseCache::init()
{
if (!cpuSidePort || !memSidePort)
panic("Cache not hooked up on both sides\n");
- cpuSidePort->sendStatusChange(Port::RangeChange);
+ cpuSidePort->sendRangeChange();
}
diff --git a/src/mem/cache/base.hh b/src/mem/cache/base.hh
index 297692b32..e6a5c284f 100644
--- a/src/mem/cache/base.hh
+++ b/src/mem/cache/base.hh
@@ -105,7 +105,7 @@ class BaseCache : public MemObject
CachePort(const std::string &_name, BaseCache *_cache,
const std::string &_label);
- virtual void recvStatusChange(Status status);
+ virtual void recvRangeChange() const;
virtual unsigned deviceBlockSize() const;
diff --git a/src/mem/cache/cache.hh b/src/mem/cache/cache.hh
index 7b1c877f9..b5c95b301 100644
--- a/src/mem/cache/cache.hh
+++ b/src/mem/cache/cache.hh
@@ -90,8 +90,7 @@ class Cache : public BaseCache
return static_cast<Cache<TagStore> *>(cache);
}
- virtual void getDeviceAddressRanges(AddrRangeList &resp,
- bool &snoop);
+ virtual AddrRangeList getAddrRanges();
virtual bool recvTiming(PacketPtr pkt);
@@ -118,8 +117,7 @@ class Cache : public BaseCache
void processSendEvent();
- virtual void getDeviceAddressRanges(AddrRangeList &resp,
- bool &snoop);
+ virtual bool isSnooping();
virtual bool recvTiming(PacketPtr pkt);
diff --git a/src/mem/cache/cache_impl.hh b/src/mem/cache/cache_impl.hh
index 1e5b59e17..46692a8d3 100644
--- a/src/mem/cache/cache_impl.hh
+++ b/src/mem/cache/cache_impl.hh
@@ -1554,14 +1554,15 @@ Cache<TagStore>::nextMSHRReadyTime()
///////////////
template<class TagStore>
-void
+AddrRangeList
Cache<TagStore>::CpuSidePort::
-getDeviceAddressRanges(AddrRangeList &resp, bool &snoop)
+getAddrRanges()
{
// CPU side port doesn't snoop; it's a target only. It can
// potentially respond to any address.
- snoop = false;
- resp.push_back(myCache()->getAddrRange());
+ AddrRangeList ranges;
+ ranges.push_back(myCache()->getAddrRange());
+ return ranges;
}
@@ -1612,14 +1613,13 @@ CpuSidePort::CpuSidePort(const std::string &_name, Cache<TagStore> *_cache,
///////////////
template<class TagStore>
-void
-Cache<TagStore>::MemSidePort::
-getDeviceAddressRanges(AddrRangeList &resp, bool &snoop)
+bool
+Cache<TagStore>::MemSidePort::isSnooping()
{
// Memory-side port always snoops, but never passes requests
// through to targets on the cpu side (so we don't add anything to
// the address range list).
- snoop = true;
+ return true;
}