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author | Daniel R. Carvalho <odanrc@yahoo.com.br> | 2018-03-30 11:20:27 +0200 |
---|---|---|
committer | Daniel Carvalho <odanrc@yahoo.com.br> | 2018-04-06 08:38:06 +0000 |
commit | 906ef2f7cd043339ea917c9bf744210dc45999a9 (patch) | |
tree | efe62c678ca6e26373868108a70719a89560728e /src/mem/cache | |
parent | affbf2a6086631e724949cf5764ba55f4e40423d (diff) | |
download | gem5-906ef2f7cd043339ea917c9bf744210dc45999a9.tar.xz |
mem: Remove unused 'using namespace'
Removal of unused/barely used 'using namespace' from C++ files.
Change-Id: I66dc548c04506db2e41180b9ea7ab5abd7d5375a
Reviewed-on: https://gem5-review.googlesource.com/9601
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Diffstat (limited to 'src/mem/cache')
-rw-r--r-- | src/mem/cache/mshr.cc | 4 | ||||
-rw-r--r-- | src/mem/cache/mshr_queue.cc | 2 | ||||
-rw-r--r-- | src/mem/cache/tags/base.cc | 2 | ||||
-rw-r--r-- | src/mem/cache/tags/base_set_assoc.cc | 2 | ||||
-rw-r--r-- | src/mem/cache/tags/fa_lru.cc | 5 | ||||
-rw-r--r-- | src/mem/cache/write_queue.cc | 2 | ||||
-rw-r--r-- | src/mem/cache/write_queue_entry.cc | 4 |
7 files changed, 3 insertions, 18 deletions
diff --git a/src/mem/cache/mshr.cc b/src/mem/cache/mshr.cc index 493b7f021..cc26b5651 100644 --- a/src/mem/cache/mshr.cc +++ b/src/mem/cache/mshr.cc @@ -60,8 +60,6 @@ #include "mem/cache/cache.hh" #include "sim/core.hh" -using namespace std; - MSHR::MSHR() : downstreamPending(false), pendingModified(false), postInvalidate(false), postDowngrade(false), @@ -617,7 +615,7 @@ MSHR::print(std::ostream &os, int verbosity, const std::string &prefix) const std::string MSHR::print() const { - ostringstream str; + std::ostringstream str; print(str); return str.str(); } diff --git a/src/mem/cache/mshr_queue.cc b/src/mem/cache/mshr_queue.cc index f4992e176..29358d737 100644 --- a/src/mem/cache/mshr_queue.cc +++ b/src/mem/cache/mshr_queue.cc @@ -47,8 +47,6 @@ #include "mem/cache/mshr_queue.hh" -using namespace std; - MSHRQueue::MSHRQueue(const std::string &_label, int num_entries, int reserve, int demand_reserve) : Queue<MSHR>(_label, num_entries, reserve), diff --git a/src/mem/cache/tags/base.cc b/src/mem/cache/tags/base.cc index d467019f6..d48acfbe1 100644 --- a/src/mem/cache/tags/base.cc +++ b/src/mem/cache/tags/base.cc @@ -52,8 +52,6 @@ #include "mem/cache/base.hh" #include "sim/sim_exit.hh" -using namespace std; - BaseTags::BaseTags(const Params *p) : ClockedObject(p), blkSize(p->block_size), blkMask(blkSize - 1), size(p->size), diff --git a/src/mem/cache/tags/base_set_assoc.cc b/src/mem/cache/tags/base_set_assoc.cc index 0ab806ee9..ac0e06f95 100644 --- a/src/mem/cache/tags/base_set_assoc.cc +++ b/src/mem/cache/tags/base_set_assoc.cc @@ -52,8 +52,6 @@ #include "base/intmath.hh" #include "sim/core.hh" -using namespace std; - BaseSetAssoc::BaseSetAssoc(const Params *p) :BaseTags(p), assoc(p->assoc), allocAssoc(p->assoc), blks(p->size / p->block_size), diff --git a/src/mem/cache/tags/fa_lru.cc b/src/mem/cache/tags/fa_lru.cc index 652abc360..f02b55a8d 100644 --- a/src/mem/cache/tags/fa_lru.cc +++ b/src/mem/cache/tags/fa_lru.cc @@ -53,8 +53,6 @@ #include "base/intmath.hh" #include "base/logging.hh" -using namespace std; - FALRU::FALRU(const Params *p) : BaseTags(p), cacheBoundaries(nullptr) { @@ -122,7 +120,6 @@ FALRU::~FALRU() void FALRU::regStats() { - using namespace Stats; BaseTags::regStats(); hits .init(numCaches+1) @@ -140,7 +137,7 @@ FALRU::regStats() ; for (unsigned i = 0; i <= numCaches; ++i) { - stringstream size_str; + std::stringstream size_str; if (i < 3){ size_str << (1<<(i+7)) <<"K"; } else { diff --git a/src/mem/cache/write_queue.cc b/src/mem/cache/write_queue.cc index 7a876b326..13e0fc519 100644 --- a/src/mem/cache/write_queue.cc +++ b/src/mem/cache/write_queue.cc @@ -48,8 +48,6 @@ #include "mem/cache/write_queue.hh" -using namespace std; - WriteQueue::WriteQueue(const std::string &_label, int num_entries, int reserve) : Queue<WriteQueueEntry>(_label, num_entries, reserve) diff --git a/src/mem/cache/write_queue_entry.cc b/src/mem/cache/write_queue_entry.cc index 663c231fa..b8275e13e 100644 --- a/src/mem/cache/write_queue_entry.cc +++ b/src/mem/cache/write_queue_entry.cc @@ -61,8 +61,6 @@ #include "mem/cache/cache.hh" #include "sim/core.hh" -using namespace std; - inline void WriteQueueEntry::TargetList::add(PacketPtr pkt, Tick readyTime, Counter order) @@ -163,7 +161,7 @@ WriteQueueEntry::print(std::ostream &os, int verbosity, std::string WriteQueueEntry::print() const { - ostringstream str; + std::ostringstream str; print(str); return str.str(); } |