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authorAndreas Hansson <andreas.hansson@arm.com>2016-04-21 04:48:19 -0400
committerAndreas Hansson <andreas.hansson@arm.com>2016-04-21 04:48:19 -0400
commita7c94f6e69d329aeca53610a3ee2d573b02ff59d (patch)
tree925aead2b097c17ed9b76bbbb08cb5e5445eb4f5 /src/mem/cache
parent13b9d4215dd0b5154f8f27fc6867a07c648a1af9 (diff)
downloadgem5-a7c94f6e69d329aeca53610a3ee2d573b02ff59d.tar.xz
mem: Remove unused cache stats
Prune cache stats that are never actually used.
Diffstat (limited to 'src/mem/cache')
-rw-r--r--src/mem/cache/base.cc36
-rw-r--r--src/mem/cache/base.hh13
2 files changed, 0 insertions, 49 deletions
diff --git a/src/mem/cache/base.cc b/src/mem/cache/base.cc
index 3ae52cebd..22e05e165 100644
--- a/src/mem/cache/base.cc
+++ b/src/mem/cache/base.cc
@@ -434,16 +434,6 @@ BaseCache::regStats()
avg_blocked = blocked_cycles / blocked_causes;
- fastWrites
- .name(name() + ".fast_writes")
- .desc("number of fast writes performed")
- ;
-
- cacheCopies
- .name(name() + ".cache_copies")
- .desc("number of cache copies performed")
- ;
-
unusedPrefetches
.name(name() + ".unused_prefetches")
.desc("number of HardPF blocks evicted w/o reference")
@@ -761,30 +751,4 @@ BaseCache::regStats()
overallAvgMshrUncacheableLatency.subname(i, system->getMasterName(i));
}
- mshr_cap_events
- .init(system->maxMasters())
- .name(name() + ".mshr_cap_events")
- .desc("number of times MSHR cap was activated")
- .flags(total | nozero | nonan)
- ;
- for (int i = 0; i < system->maxMasters(); i++) {
- mshr_cap_events.subname(i, system->getMasterName(i));
- }
-
- //software prefetching stats
- soft_prefetch_mshr_full
- .init(system->maxMasters())
- .name(name() + ".soft_prefetch_mshr_full")
- .desc("number of mshr full events for SW prefetching instrutions")
- .flags(total | nozero | nonan)
- ;
- for (int i = 0; i < system->maxMasters(); i++) {
- soft_prefetch_mshr_full.subname(i, system->getMasterName(i));
- }
-
- mshr_no_allocate_misses
- .name(name() +".no_allocate_misses")
- .desc("Number of misses that were no-allocate")
- ;
-
}
diff --git a/src/mem/cache/base.hh b/src/mem/cache/base.hh
index 9275eb453..ffff6f058 100644
--- a/src/mem/cache/base.hh
+++ b/src/mem/cache/base.hh
@@ -381,12 +381,6 @@ class BaseCache : public MemObject
/** The average number of cycles blocked for each blocked cause. */
Stats::Formula avg_blocked;
- /** The number of fast writes (WH64) performed. */
- Stats::Scalar fastWrites;
-
- /** The number of cache copies performed. */
- Stats::Scalar cacheCopies;
-
/** The number of times a HW-prefetched block is evicted w/o reference. */
Stats::Scalar unusedPrefetches;
@@ -452,13 +446,6 @@ class BaseCache : public MemObject
/** The average overall latency of an MSHR miss. */
Stats::Formula overallAvgMshrUncacheableLatency;
- /** The number of times a thread hit its MSHR cap. */
- Stats::Vector mshr_cap_events;
- /** The number of times software prefetches caused the MSHR to block. */
- Stats::Vector soft_prefetch_mshr_full;
-
- Stats::Scalar mshr_no_allocate_misses;
-
/**
* @}
*/