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| author | Steve Reinhardt <steve.reinhardt@amd.com> | 2010-10-18 13:05:15 -0700 |
|---|---|---|
| committer | Steve Reinhardt <steve.reinhardt@amd.com> | 2010-10-18 13:05:15 -0700 |
| commit | 45aebaccde9af3ef50f8ee168606a370952a99ab (patch) | |
| tree | dc5126be1507f8fa6ff8e64a5943b91b371c96f5 /src/mem/cache | |
| parent | 968447db6681f2a2d7358195bbff53b60c75bedb (diff) | |
| download | gem5-45aebaccde9af3ef50f8ee168606a370952a99ab.tar.xz | |
cache: minor SC assertion fix
Thanks to Joe Gross for finding/testing this.
Diffstat (limited to 'src/mem/cache')
| -rw-r--r-- | src/mem/cache/cache_impl.hh | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/mem/cache/cache_impl.hh b/src/mem/cache/cache_impl.hh index 7d19ff7a1..c5b7ca065 100644 --- a/src/mem/cache/cache_impl.hh +++ b/src/mem/cache/cache_impl.hh @@ -906,7 +906,8 @@ Cache<TagStore>::handleResponse(PacketPtr pkt) } else if (pkt->cmd == MemCmd::UpgradeFailResp) { // failed StoreCond upgrade assert(target->pkt->cmd == MemCmd::StoreCondReq || - target->pkt->cmd == MemCmd::StoreCondFailReq); + target->pkt->cmd == MemCmd::StoreCondFailReq || + target->pkt->cmd == MemCmd::SCUpgradeFailReq); completion_time = tags->getHitLatency() + pkt->finishTime; target->pkt->req->setExtraData(0); } else { |