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author | Nathan Binkert <binkertn@umich.edu> | 2007-03-06 11:13:43 -0800 |
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committer | Nathan Binkert <binkertn@umich.edu> | 2007-03-06 11:13:43 -0800 |
commit | d55b25cde6d2c072885a2c468d209fb18d6628e6 (patch) | |
tree | 391c4e66a69818a95037a5f2adccb2e8e0c84648 /src/mem/cache | |
parent | f800fddcea850822efee031b9b904280639da4c6 (diff) | |
download | gem5-d55b25cde6d2c072885a2c468d209fb18d6628e6.tar.xz |
Move all of the parameters of the Root SimObject so they are
directly configured by python. Move stuff from root.(cc|hh) to
core.(cc|hh) since it really belogs there now.
In the process, simplify how ticks are used in the python code.
--HG--
extra : convert_revision : cf82ee1ea20f9343924f30bacc2a38d4edee8df3
Diffstat (limited to 'src/mem/cache')
-rw-r--r-- | src/mem/cache/cache_blk.hh | 2 | ||||
-rw-r--r-- | src/mem/cache/miss/mshr.cc | 2 | ||||
-rw-r--r-- | src/mem/cache/tags/iic.cc | 2 | ||||
-rw-r--r-- | src/mem/cache/tags/lru.cc | 2 | ||||
-rw-r--r-- | src/mem/cache/tags/split_lifo.cc | 2 | ||||
-rw-r--r-- | src/mem/cache/tags/split_lru.cc | 2 |
6 files changed, 6 insertions, 6 deletions
diff --git a/src/mem/cache/cache_blk.hh b/src/mem/cache/cache_blk.hh index a4df1b03f..fa00a0f5a 100644 --- a/src/mem/cache/cache_blk.hh +++ b/src/mem/cache/cache_blk.hh @@ -37,7 +37,7 @@ #include <list> -#include "sim/root.hh" // for Tick +#include "sim/core.hh" // for Tick #include "arch/isa_traits.hh" // for Addr #include "mem/request.hh" diff --git a/src/mem/cache/miss/mshr.cc b/src/mem/cache/miss/mshr.cc index 352d1ec6f..74dad658b 100644 --- a/src/mem/cache/miss/mshr.cc +++ b/src/mem/cache/miss/mshr.cc @@ -39,7 +39,7 @@ #include <vector> #include "mem/cache/miss/mshr.hh" -#include "sim/root.hh" // for curTick +#include "sim/core.hh" // for curTick #include "sim/host.hh" #include "base/misc.hh" #include "mem/cache/cache.hh" diff --git a/src/mem/cache/tags/iic.cc b/src/mem/cache/tags/iic.cc index 20e2ef0ac..9c802d0dc 100644 --- a/src/mem/cache/tags/iic.cc +++ b/src/mem/cache/tags/iic.cc @@ -42,7 +42,7 @@ #include "mem/cache/base_cache.hh" #include "mem/cache/tags/iic.hh" #include "base/intmath.hh" -#include "sim/root.hh" // for curTick +#include "sim/core.hh" // for curTick #include "base/trace.hh" // for DPRINTF diff --git a/src/mem/cache/tags/lru.cc b/src/mem/cache/tags/lru.cc index 102bb3506..8e8779774 100644 --- a/src/mem/cache/tags/lru.cc +++ b/src/mem/cache/tags/lru.cc @@ -38,7 +38,7 @@ #include "mem/cache/base_cache.hh" #include "base/intmath.hh" #include "mem/cache/tags/lru.hh" -#include "sim/root.hh" +#include "sim/core.hh" using namespace std; diff --git a/src/mem/cache/tags/split_lifo.cc b/src/mem/cache/tags/split_lifo.cc index 792ff8fa7..d71d1a3ef 100644 --- a/src/mem/cache/tags/split_lifo.cc +++ b/src/mem/cache/tags/split_lifo.cc @@ -38,7 +38,7 @@ #include "mem/cache/base_cache.hh" #include "base/intmath.hh" #include "mem/cache/tags/split_lifo.hh" -#include "sim/root.hh" +#include "sim/core.hh" #include "base/trace.hh" using namespace std; diff --git a/src/mem/cache/tags/split_lru.cc b/src/mem/cache/tags/split_lru.cc index c37d72cb7..7227fb5c1 100644 --- a/src/mem/cache/tags/split_lru.cc +++ b/src/mem/cache/tags/split_lru.cc @@ -38,7 +38,7 @@ #include "mem/cache/base_cache.hh" #include "base/intmath.hh" #include "mem/cache/tags/split_lru.hh" -#include "sim/root.hh" +#include "sim/core.hh" using namespace std; |