summaryrefslogtreecommitdiff
path: root/src/mem/coherent_bus.cc
diff options
context:
space:
mode:
authorAndreas Hansson <andreas.hansson@arm.com>2013-02-19 05:56:06 -0500
committerAndreas Hansson <andreas.hansson@arm.com>2013-02-19 05:56:06 -0500
commit860155a5fc48f983e9af40c19bf8db8250709c26 (patch)
tree18c5c3ccb573182ba8444fae02c2c84f2bb4a3c5 /src/mem/coherent_bus.cc
parent40d0e6c899d5da400c9647496532a8fb1ef64b7b (diff)
downloadgem5-860155a5fc48f983e9af40c19bf8db8250709c26.tar.xz
mem: Enforce strict use of busFirst- and busLastWordTime
This patch adds a check to ensure that the delay incurred by the bus is not simply disregarded, but accounted for by someone. At this point, all the modules do is to zero it out, and no additional time is spent. This highlights where the bus timing is simply dropped instead of being paid for. As a follow up, the locations identified in this patch should add this additional time to the packets in one way or another. For now it simply acts as a sanity check and highlights where the delay is simply ignored. Since no time is added, all regressions remain the same.
Diffstat (limited to 'src/mem/coherent_bus.cc')
-rw-r--r--src/mem/coherent_bus.cc3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/mem/coherent_bus.cc b/src/mem/coherent_bus.cc
index b57484ab3..0166872a7 100644
--- a/src/mem/coherent_bus.cc
+++ b/src/mem/coherent_bus.cc
@@ -179,6 +179,9 @@ CoherentBus::recvTimingReq(PacketPtr pkt, PortID slave_port_id)
if (add_outstanding)
outstandingReq.erase(pkt->req);
+ // undo the calculation so we can check for 0 again
+ pkt->busFirstWordDelay = pkt->busLastWordDelay = 0;
+
DPRINTF(CoherentBus, "recvTimingReq: src %s %s 0x%x RETRY\n",
src_port->name(), pkt->cmdString(), pkt->getAddr());