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authorJiuyue Ma <majiuyue@ncic.ac.cn>2014-07-17 12:05:41 +0800
committerJiuyue Ma <majiuyue@ncic.ac.cn>2014-07-17 12:05:41 +0800
commite1a5522a8927af9e39ebd8961673a1e8a5e18364 (patch)
treed9929c4ee0b4fbf0fcdd67705982232018d755e0 /src/mem/comm_monitor.hh
parent7d03bf4d6b8eb8445676575f72987bef3c81f480 (diff)
downloadgem5-e1a5522a8927af9e39ebd8961673a1e8a5e18364.tar.xz
config, x86: Ensure that PCI devs get bridged to the memory bus
This patch force IO device to be mapped to 0xC0000000-0xFFFF0000 by reserve anything between the end of memory and 3GB if memory is less than 3GB. It also statically bridge these address range to the IO bus, which guaranty access to pci address space will pass though bridge to iobus. Committed by: Nilay Vaish <nilay@cs.wisc.edu>
Diffstat (limited to 'src/mem/comm_monitor.hh')
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