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| author | Nikos Nikoleris <nikos.nikoleris@arm.com> | 2018-05-03 15:51:41 +0100 |
|---|---|---|
| committer | Nikos Nikoleris <nikos.nikoleris@arm.com> | 2018-05-31 15:12:49 +0000 |
| commit | 7d990bd25b478d906442ea63e1de6b381b51817b (patch) | |
| tree | 782ff2fb9979352123d43998b3f99334b78317bc /src/mem/dramsim2_wrapper.cc | |
| parent | 41db9b95aa234094da62fdd3a863870b175d8f97 (diff) | |
| download | gem5-7d990bd25b478d906442ea63e1de6b381b51817b.tar.xz | |
mem-cache: Move cache bypass mechanism to the ports
Cache bypass is necessary for cpu models like the KvmCPU. Previously
the bypass would happen at the cache classes. With this change the
bypassing happens directly at the ports.
Change-Id: I34de9fc63383aee8590643e169501ea6060d2d62
Reviewed-on: https://gem5-review.googlesource.com/10432
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Diffstat (limited to 'src/mem/dramsim2_wrapper.cc')
0 files changed, 0 insertions, 0 deletions