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| author | Andreas Hansson <andreas.hansson@arm.com> | 2013-02-19 05:56:06 -0500 |
|---|---|---|
| committer | Andreas Hansson <andreas.hansson@arm.com> | 2013-02-19 05:56:06 -0500 |
| commit | 7cd49b24d2523eaf21179946e291c46c6acf5bfc (patch) | |
| tree | 91c066608dfb6e4ca52dd25e91a61719848d64a7 /src/mem/noncoherent_bus.cc | |
| parent | 5c7ebee434a0328802c01b38c19845c50ae75cab (diff) | |
| download | gem5-7cd49b24d2523eaf21179946e291c46c6acf5bfc.tar.xz | |
sim: Make clock private and access using clockPeriod()
This patch makes the clock member private to the ClockedObject and
forces all children to access it using clockPeriod(). This makes it
impossible to inadvertently change the clock, and also makes it easier
to transition to a situation where the clock is derived from e.g. a
clock domain, or through a multiplier.
Diffstat (limited to 'src/mem/noncoherent_bus.cc')
| -rw-r--r-- | src/mem/noncoherent_bus.cc | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/mem/noncoherent_bus.cc b/src/mem/noncoherent_bus.cc index f14f6e3d6..ae5344425 100644 --- a/src/mem/noncoherent_bus.cc +++ b/src/mem/noncoherent_bus.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2011-2012 ARM Limited + * Copyright (c) 2011-2013 ARM Limited * All rights reserved * * The license below extends only to copyright in the software and shall @@ -55,8 +55,8 @@ #include "mem/noncoherent_bus.hh" NoncoherentBus::NoncoherentBus(const NoncoherentBusParams *p) - : BaseBus(p), reqLayer(*this, ".reqLayer", p->clock), - respLayer(*this, ".respLayer", p->clock) + : BaseBus(p), reqLayer(*this, ".reqLayer"), + respLayer(*this, ".respLayer") { // create the ports based on the size of the master and slave // vector ports, and the presence of the default port, the ports |