diff options
| author | Ron Dreslinski <rdreslin@umich.edu> | 2006-10-09 20:18:00 -0400 |
|---|---|---|
| committer | Ron Dreslinski <rdreslin@umich.edu> | 2006-10-09 20:18:00 -0400 |
| commit | ec8a437b2c11453e9b94978b0c18a31f12ec04ac (patch) | |
| tree | fc55b2909d7a5c3140f9bd2eafc16a9ec13318df /src/mem/packet.hh | |
| parent | 9356bcda7b50ae8916eee2dfbad84ed3ea873c1e (diff) | |
| download | gem5-ec8a437b2c11453e9b94978b0c18a31f12ec04ac.tar.xz | |
Handle NACK's that occur from devices on the same bus.
Not fully implemented yet, but good enough for single level cache coherence
src/mem/packet.hh:
Add a bit to distinguish invalidates and upgrades
--HG--
extra : convert_revision : 5bf50d535857cea37fbdaf7993915d1332cb757e
Diffstat (limited to 'src/mem/packet.hh')
| -rw-r--r-- | src/mem/packet.hh | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/src/mem/packet.hh b/src/mem/packet.hh index 56c4caffe..e8cbfd10e 100644 --- a/src/mem/packet.hh +++ b/src/mem/packet.hh @@ -174,7 +174,8 @@ class Packet IsResponse = 1 << 5, NeedsResponse = 1 << 6, IsSWPrefetch = 1 << 7, - IsHWPrefetch = 1 << 8 + IsHWPrefetch = 1 << 8, + IsUpgrade = 1 << 9 }; public: @@ -194,7 +195,7 @@ class Packet HardPFResp = IsRead | IsResponse | IsHWPrefetch | NeedsResponse, InvalidateReq = IsInvalidate | IsRequest, WriteInvalidateReq = IsWrite | IsInvalidate | IsRequest, - UpgradeReq = IsInvalidate | IsRequest, + UpgradeReq = IsInvalidate | IsRequest | IsUpgrade, ReadExReq = IsRead | IsInvalidate | IsRequest | NeedsResponse, ReadExResp = IsRead | IsInvalidate | IsResponse | NeedsResponse }; |