summaryrefslogtreecommitdiff
path: root/src/mem/packet_access.hh
diff options
context:
space:
mode:
authorGabe Black <gabeblack@google.com>2018-10-12 05:14:01 -0700
committerGabe Black <gabeblack@google.com>2019-11-01 23:41:14 +0000
commit5fa59a283148aec728320e2d527c0157edfa5b66 (patch)
tree929c81d5f2ff1168a142d229601eb3346066e85c /src/mem/packet_access.hh
parentf97051aa4f031445cb8503a23f3de1218a9fc94f (diff)
downloadgem5-5fa59a283148aec728320e2d527c0157edfa5b66.tar.xz
mem: Delete the packet accessors which use guest endianness.
These accessors create an extra dependency on the guest OS, and can be avoided. Now that all their uses have been removed, they aren't needed any more. Change-Id: I466c07fef99bce2d7964c07a7ac3dd398691378b Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/13465 Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Jason Lowe-Power <jason@lowepower.com>
Diffstat (limited to 'src/mem/packet_access.hh')
-rw-r--r--src/mem/packet_access.hh25
1 files changed, 3 insertions, 22 deletions
diff --git a/src/mem/packet_access.hh b/src/mem/packet_access.hh
index 97357ae5e..06c1068eb 100644
--- a/src/mem/packet_access.hh
+++ b/src/mem/packet_access.hh
@@ -42,13 +42,12 @@
* Andreas Sandberg
*/
-#include "arch/isa_traits.hh"
-#include "mem/packet.hh"
-#include "sim/byteswap.hh"
-
#ifndef __MEM_PACKET_ACCESS_HH__
#define __MEM_PACKET_ACCESS_HH__
+#include "mem/packet.hh"
+#include "sim/byteswap.hh"
+
template <typename T>
inline T
Packet::getRaw() const
@@ -98,15 +97,6 @@ Packet::get(ByteOrder endian) const
};
}
-#if THE_ISA != NULL_ISA
-template <typename T>
-inline T
-Packet::get() const
-{
- return TheISA::gtoh(getRaw<T>());
-}
-#endif
-
template <typename T>
inline void
Packet::setBE(T v)
@@ -137,13 +127,4 @@ Packet::set(T v, ByteOrder endian)
};
}
-#if THE_ISA != NULL_ISA
-template <typename T>
-inline void
-Packet::set(T v)
-{
- setRaw(TheISA::htog(v));
-}
-#endif
-
#endif //__MEM_PACKET_ACCESS_HH__