mem: Order packet queue only on matching addresses

Instead of conservatively enforcing order for all packets, which may
negatively impact the simulated-system performance, this patch updates
the packet queue such that it only applies the restriction if there
are already packets with the same address in the queue.

The basic need for the order enforcement is due to coherency
interactions where requests/responses to the same cache line must not
over-take each other. We rely on the fact that any packet that needs
order enforcement will have a block-aligned address. Thus, there is no
need for the queue to know about the cacheline size.

1 files changed, 1 insertions, 2 deletions

diff --git a/src/mem/packet_queue.hh b/src/mem/packet_queue.hh
index e9cf34bb0..866a4477a 100644
--- a/src/mem/packet_queue.hh
+++ b/src/mem/packet_queue.hh
@@ -176,8 +176,7 @@ class PacketQueue : public Drainable
      *
      * @param pkt Packet to send
      * @param when Absolute time (in ticks) to send packet
-     * @param force_order Do not reorder packets despite timing, but keep them
-     *                    in insertion order.
+     * @param force_order Force insertion order for packets with same address
      */
     void schedSendTiming(PacketPtr pkt, Tick when, bool force_order = false);