TLB: Fix serialization issues with the tlb entries and make the page table store the process, not the system.

--HG--
extra : convert_revision : 2421af11f62f60fb48faeee6bddadac2987df0e8

1 files changed, 6 insertions, 4 deletions

diff --git a/src/mem/page_table.cc b/src/mem/page_table.cc
index 8889879c3..6220305b8 100644
--- a/src/mem/page_table.cc
+++ b/src/mem/page_table.cc
@@ -43,15 +43,16 @@
 #include "base/intmath.hh"
 #include "base/trace.hh"
 #include "mem/page_table.hh"
+#include "sim/process.hh"
 #include "sim/sim_object.hh"
 #include "sim/system.hh"
 
 using namespace std;
 using namespace TheISA;
 
-PageTable::PageTable(System *_system, Addr _pageSize)
+PageTable::PageTable(Process *_process, Addr _pageSize)
     : pageSize(_pageSize), offsetMask(mask(floorLog2(_pageSize))),
-      system(_system)
+      process(_process)
 {
     assert(isPowerOf2(pageSize));
     pTableCache[0].vaddr = 0;
@@ -80,7 +81,8 @@ PageTable::allocate(Addr vaddr, int64_t size)
                     vaddr);
         }
 
-        pTable[vaddr] = TheISA::TlbEntry(system->new_page());
+        pTable[vaddr] = TheISA::TlbEntry(process->M5_pid, vaddr,
+                process->system->new_page());
         updateCache(vaddr, pTable[vaddr]);
     }
 }
@@ -122,7 +124,7 @@ PageTable::translate(Addr vaddr, Addr &paddr)
         DPRINTF(MMU, "Couldn't Translate: %#x\n", vaddr);
         return false;
     }
-    paddr = pageOffset(vaddr) + entry.pageStart;
+    paddr = pageOffset(vaddr) + entry.pageStart();
     DPRINTF(MMU, "Translating: %#x->%#x\n", vaddr, paddr);
     return true;
 }