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author | Gabe Black <gblack@eecs.umich.edu> | 2009-04-06 10:19:36 -0700 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2009-04-06 10:19:36 -0700 |
commit | d080581db1f9ee4e1e6d07d2b01c13c67908a391 (patch) | |
tree | cc484b289fa5a30c4631f9faa1d8b456bffeebfc /src/mem/page_table.cc | |
parent | 7a7c4c5fca83a8d47c7e71c9c080a882ebe204a9 (diff) | |
parent | 639cb0a42d953ee32bc7e96b0cdfa96cd40e9fc1 (diff) | |
download | gem5-d080581db1f9ee4e1e6d07d2b01c13c67908a391.tar.xz |
Merge ARM into the head. ARM will compile but may not actually work.
Diffstat (limited to 'src/mem/page_table.cc')
-rw-r--r-- | src/mem/page_table.cc | 38 |
1 files changed, 38 insertions, 0 deletions
diff --git a/src/mem/page_table.cc b/src/mem/page_table.cc index 54165f293..bdcbbfec3 100644 --- a/src/mem/page_table.cc +++ b/src/mem/page_table.cc @@ -87,6 +87,44 @@ PageTable::allocate(Addr vaddr, int64_t size) } } +void +PageTable::remap(Addr vaddr, int64_t size, Addr new_vaddr) +{ + assert(pageOffset(vaddr) == 0); + assert(pageOffset(new_vaddr) == 0); + + DPRINTF(MMU, "moving pages from vaddr %08p to %08p, size = %d\n", vaddr, + new_vaddr, size); + + for (; size > 0; size -= pageSize, vaddr += pageSize, new_vaddr += pageSize) { + PTableItr iter = pTable.find(vaddr); + + assert(iter != pTable.end()); + + pTable[new_vaddr] = pTable[vaddr]; + pTable.erase(vaddr); + pTable[new_vaddr].updateVaddr(new_vaddr); + updateCache(new_vaddr, pTable[new_vaddr]); + } +} + +void +PageTable::deallocate(Addr vaddr, int64_t size) +{ + assert(pageOffset(vaddr) == 0); + + DPRINTF(MMU, "Deallocating page: %#x-%#x\n", vaddr, vaddr+ size); + + for (; size > 0; size -= pageSize, vaddr += pageSize) { + PTableItr iter = pTable.find(vaddr); + + assert(iter != pTable.end()); + + pTable.erase(vaddr); + } + +} + bool PageTable::lookup(Addr vaddr, TheISA::TlbEntry &entry) { |