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authorAli Saidi <saidi@eecs.umich.edu>2007-06-05 01:03:35 -0400
committerAli Saidi <saidi@eecs.umich.edu>2007-06-05 01:03:35 -0400
commit85986e9dff0e3dc7e54adf4da54a7c099c7e815f (patch)
treefa69f5af71e8390d8e9982e0d700f2932620f415 /src/mem/page_table.hh
parent48133a0f04d43f71a90984eff1899fc2556bb6ec (diff)
downloadgem5-85986e9dff0e3dc7e54adf4da54a7c099c7e815f.tar.xz
Clean up some of vincent's code and commit it
Makes page table cache scheme actually work src/mem/page_table.cc: src/mem/page_table.hh: fix caching scheme to actually work and improve performance --HG-- extra : convert_revision : 443a8d8acbee540b26affcfdfbf107b8e735d1bd
Diffstat (limited to 'src/mem/page_table.hh')
-rw-r--r--src/mem/page_table.hh16
1 files changed, 16 insertions, 0 deletions
diff --git a/src/mem/page_table.hh b/src/mem/page_table.hh
index 0e2b1f58c..64c824238 100644
--- a/src/mem/page_table.hh
+++ b/src/mem/page_table.hh
@@ -95,6 +95,22 @@ class PageTable
*/
Fault translate(RequestPtr &req);
+ /**
+ * Update the page table cache.
+ * @param vaddr virtual address (page aligned) to check
+ * @param paddr physical address (page aligned) to return
+ */
+ inline void updateCache(Addr vaddr, Addr paddr)
+ {
+ pTableCache[2].paddr = pTableCache[1].paddr;
+ pTableCache[2].vaddr = pTableCache[1].vaddr;
+ pTableCache[1].paddr = pTableCache[0].paddr;
+ pTableCache[1].vaddr = pTableCache[0].vaddr;
+ pTableCache[0].paddr = paddr;
+ pTableCache[0].vaddr = vaddr;
+ }
+
+
void serialize(std::ostream &os);
void unserialize(Checkpoint *cp, const std::string &section);
};