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authorAndreas Hansson <andreas.hansson@arm.com>2014-09-20 17:18:32 -0400
committerAndreas Hansson <andreas.hansson@arm.com>2014-09-20 17:18:32 -0400
commit1f6d5f8f849f50a3646f586b1274708537124ef3 (patch)
tree03c98c46d500fbd9ac8135baea399813ea3d5644 /src/mem/physical.cc
parent1884bcc03ba2b6e734b4bd379d8542596e6d5c84 (diff)
downloadgem5-1f6d5f8f849f50a3646f586b1274708537124ef3.tar.xz
mem: Rename Bus to XBar to better reflect its behaviour
This patch changes the name of the Bus classes to XBar to better reflect the actual timing behaviour. The actual instances in the config scripts are not renamed, and remain as e.g. iobus or membus. As part of this renaming, the code has also been clean up slightly, making use of range-based for loops and tidying up some comments. The only changes outside the bus/crossbar code is due to the delay variables in the packet. --HG-- rename : src/mem/Bus.py => src/mem/XBar.py rename : src/mem/coherent_bus.cc => src/mem/coherent_xbar.cc rename : src/mem/coherent_bus.hh => src/mem/coherent_xbar.hh rename : src/mem/noncoherent_bus.cc => src/mem/noncoherent_xbar.cc rename : src/mem/noncoherent_bus.hh => src/mem/noncoherent_xbar.hh rename : src/mem/bus.cc => src/mem/xbar.cc rename : src/mem/bus.hh => src/mem/xbar.hh
Diffstat (limited to 'src/mem/physical.cc')
-rw-r--r--src/mem/physical.cc8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/mem/physical.cc b/src/mem/physical.cc
index 1b76b52e8..08ec83410 100644
--- a/src/mem/physical.cc
+++ b/src/mem/physical.cc
@@ -51,7 +51,7 @@
#include <string>
#include "base/trace.hh"
-#include "debug/BusAddrRanges.hh"
+#include "debug/AddrRanges.hh"
#include "debug/Checkpoint.hh"
#include "mem/abstract_mem.hh"
#include "mem/physical.hh"
@@ -79,7 +79,7 @@ PhysicalMemory::PhysicalMemory(const string& _name,
fatal("Memory address range for %s is overlapping\n",
(*m)->name());
} else {
- DPRINTF(BusAddrRanges,
+ DPRINTF(AddrRanges,
"Skipping memory %s that is not in global address map\n",
(*m)->name());
// this type of memory is used e.g. as reference memory by
@@ -144,7 +144,7 @@ PhysicalMemory::createBackingStore(AddrRange range,
range.to_string());
// perform the actual mmap
- DPRINTF(BusAddrRanges, "Creating backing store for range %s with size %d\n",
+ DPRINTF(AddrRanges, "Creating backing store for range %s with size %d\n",
range.to_string(), range.size());
int map_flags = MAP_ANON | MAP_PRIVATE;
uint8_t* pmem = (uint8_t*) mmap(NULL, range.size(),
@@ -164,7 +164,7 @@ PhysicalMemory::createBackingStore(AddrRange range,
// point the memories to their backing store
for (vector<AbstractMemory*>::const_iterator m = _memories.begin();
m != _memories.end(); ++m) {
- DPRINTF(BusAddrRanges, "Mapping memory %s to backing store\n",
+ DPRINTF(AddrRanges, "Mapping memory %s to backing store\n",
(*m)->name());
(*m)->setBackingStore(pmem);
}