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authorAli Saidi <Ali.Saidi@ARM.com>2012-01-25 17:18:25 +0000
committerAli Saidi <Ali.Saidi@ARM.com>2012-01-25 17:18:25 +0000
commite1c48dfce556ddb5ae2189dd8ef5ef542170b304 (patch)
treed36862bd47062acdc0444498236ed28d51890ee4 /src/mem/physical.cc
parent24c23009980a11dfba147fb4ed93329f4dcf4c0d (diff)
downloadgem5-e1c48dfce556ddb5ae2189dd8ef5ef542170b304.tar.xz
Mem: Add simple bandwidth stats to PhysicalMemory
Diffstat (limited to 'src/mem/physical.cc')
-rw-r--r--src/mem/physical.cc68
1 files changed, 67 insertions, 1 deletions
diff --git a/src/mem/physical.cc b/src/mem/physical.cc
index 8b319940b..a63f6e619 100644
--- a/src/mem/physical.cc
+++ b/src/mem/physical.cc
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2010 ARM Limited
+ * Copyright (c) 2010-2011 ARM Limited
* All rights reserved
*
* The license below extends only to copyright in the software and shall
@@ -126,6 +126,65 @@ PhysicalMemory::~PhysicalMemory()
munmap((char*)pmemAddr, size());
}
+void
+PhysicalMemory::regStats()
+{
+ using namespace Stats;
+
+ bytesRead
+ .name(name() + ".bytes_read")
+ .desc("Number of bytes read from this memory")
+ ;
+ bytesInstRead
+ .name(name() + ".bytes_inst_read")
+ .desc("Number of instructions bytes read from this memory")
+ ;
+ bytesWritten
+ .name(name() + ".bytes_written")
+ .desc("Number of bytes written to this memory")
+ ;
+ numReads
+ .name(name() + ".num_reads")
+ .desc("Number of read requests responded to by this memory")
+ ;
+ numWrites
+ .name(name() + ".num_writes")
+ .desc("Number of write requests responded to by this memory")
+ ;
+ numOther
+ .name(name() + ".num_other")
+ .desc("Number of other requests responded to by this memory")
+ ;
+ bwRead
+ .name(name() + ".bw_read")
+ .desc("Total read bandwidth from this memory (bytes/s)")
+ .precision(0)
+ .prereq(bytesRead)
+ ;
+ bwInstRead
+ .name(name() + ".bw_inst_read")
+ .desc("Instruction read bandwidth from this memory (bytes/s)")
+ .precision(0)
+ .prereq(bytesInstRead)
+ ;
+ bwWrite
+ .name(name() + ".bw_write")
+ .desc("Write bandwidth from this memory (bytes/s)")
+ .precision(0)
+ .prereq(bytesWritten)
+ ;
+ bwTotal
+ .name(name() + ".bw_total")
+ .desc("Total bandwidth to/from this memory (bytes/s)")
+ .precision(0)
+ .prereq(bwTotal)
+ ;
+ bwRead = bytesRead / simSeconds;
+ bwInstRead = bytesInstRead / simSeconds;
+ bwWrite = bytesWritten / simSeconds;
+ bwTotal = (bytesRead + bytesWritten) / simSeconds;
+}
+
unsigned
PhysicalMemory::deviceBlockSize() const
{
@@ -304,6 +363,7 @@ PhysicalMemory::doAtomicAccess(PacketPtr pkt)
assert(!pkt->req->isInstFetch());
TRACE_PACKET("Read/Write");
+ numOther++;
} else if (pkt->isRead()) {
assert(!pkt->isWrite());
if (pkt->isLLSC()) {
@@ -312,12 +372,18 @@ PhysicalMemory::doAtomicAccess(PacketPtr pkt)
if (pmemAddr)
memcpy(pkt->getPtr<uint8_t>(), hostAddr, pkt->getSize());
TRACE_PACKET(pkt->req->isInstFetch() ? "IFetch" : "Read");
+ numReads++;
+ bytesRead += pkt->getSize();
+ if (pkt->req->isInstFetch())
+ bytesInstRead += pkt->getSize();
} else if (pkt->isWrite()) {
if (writeOK(pkt)) {
if (pmemAddr)
memcpy(hostAddr, pkt->getPtr<uint8_t>(), pkt->getSize());
assert(!pkt->req->isInstFetch());
TRACE_PACKET("Write");
+ numWrites++;
+ bytesWritten += pkt->getSize();
}
} else if (pkt->isInvalidate()) {
//upgrade or invalidate