Minor fixes for full-system timing memory.

Need to rewrite bus bridge to get any further.

src/dev/io_device.cc:
    Set packet dest on timing responses.
src/mem/bus.cc:
    Fix dest addr bounds check assertion.
    Add assertion to catch infinite loopbacks.
src/mem/physical.cc:
    Add comment.

--HG--
extra : convert_revision : 419b65a3a61e2d099884dbda117b338dffd80896

1 files changed, 1 insertions, 0 deletions

diff --git a/src/mem/physical.cc b/src/mem/physical.cc
index bc2500678..75179f9e3 100644
--- a/src/mem/physical.cc
+++ b/src/mem/physical.cc
@@ -127,6 +127,7 @@ PhysicalMemory::doTimingAccess (Packet *pkt, MemoryPort* memoryPort)
 {
     doFunctionalAccess(pkt);
 
+    // turn packet around to go back to requester
     pkt->dest = pkt->src;
     MemResponseEvent* response = new MemResponseEvent(pkt, memoryPort);
     response->schedule(curTick + lat);