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| author | Iru Cai <mytbk920423@gmail.com> | 2019-02-28 17:07:16 +0800 |
|---|---|---|
| committer | Iru Cai <mytbk920423@gmail.com> | 2019-03-20 17:32:12 +0800 |
| commit | 32986563546481d9ac17280cd0aadb39b87b9817 (patch) | |
| tree | a3acaa4ffdd3764d92dda1973e996ca9f6a09b76 /src/mem/port.cc | |
| parent | 0c50a0b4fe3956f9d2e08e75d47c9cbd79bf0268 (diff) | |
| download | gem5-32986563546481d9ac17280cd0aadb39b87b9817.tar.xz | |
invisispec-1.0 source
Diffstat (limited to 'src/mem/port.cc')
| -rw-r--r-- | src/mem/port.cc | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mem/port.cc b/src/mem/port.cc index 47f56e633..318a65308 100644 --- a/src/mem/port.cc +++ b/src/mem/port.cc @@ -176,6 +176,7 @@ MasterPort::sendFunctional(PacketPtr pkt) return _slavePort->recvFunctional(pkt); } +// [InvisiSpec] Request from CPU to Ruby bool MasterPort::sendTimingReq(PacketPtr pkt) { |