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authorAli Saidi <saidi@eecs.umich.edu>2006-06-08 19:03:58 -0400
committerAli Saidi <saidi@eecs.umich.edu>2006-06-08 19:03:58 -0400
commit8ee856f1d53f9b181a06183c8c86855898b82ba7 (patch)
tree9566627ea771ec643b6736c8e83d6422a6e88092 /src/mem/port_impl.hh
parent54d4220b004a385d04def37fa55c820366da0d4a (diff)
downloadgem5-8ee856f1d53f9b181a06183c8c86855898b82ba7.tar.xz
add write/read functions that have endian conversions in them
when we get a virtual port delete it (even though delete does nothing in these cases) src/arch/alpha/linux/system.cc: src/arch/alpha/stacktrace.cc: src/base/remote_gdb.cc: src/cpu/simple_thread.cc: when we get a virtual port delete it (even though delete does nothing in this case) src/mem/port.hh: src/mem/vport.hh: add write/read functions that have endian conversions in them --HG-- extra : convert_revision : 163e05cc038c461f95c92f8ce55422033f9ea513
Diffstat (limited to 'src/mem/port_impl.hh')
-rw-r--r--src/mem/port_impl.hh53
1 files changed, 53 insertions, 0 deletions
diff --git a/src/mem/port_impl.hh b/src/mem/port_impl.hh
new file mode 100644
index 000000000..e9a159293
--- /dev/null
+++ b/src/mem/port_impl.hh
@@ -0,0 +1,53 @@
+/*
+ * Copyright (c) 2006 The Regents of The University of Michigan
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Ali Saidi
+ */
+
+#include "arch/isa_specific.hh"
+#include "arch/isa_traits.hh"
+#include "mem/port.hh"
+#include "sim/byteswap.hh"
+
+template <typename T>
+void
+FunctionalPort::writeHtoG(Addr addr, T d)
+{
+ d = TheISA::htog(d);
+ writeBlob(addr, (uint8_t*)&d, sizeof(T));
+}
+
+
+template <typename T>
+T
+FunctionalPort::readGtoH(Addr addr)
+{
+ T d;
+ readBlob(addr, (uint8_t*)&d, sizeof(T));
+ return TheISA::gtoh(d);
+}
+