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authorNikos Nikoleris <nikos.nikoleris@arm.com>2017-03-13 18:19:08 +0000
committerNikos Nikoleris <nikos.nikoleris@arm.com>2017-06-13 15:52:32 +0000
commit12db50c89584938839e035da47d206250cbfd7c2 (patch)
tree831a4151b29cdc14958b8dab2cce97fc3136d7b6 /src/mem/protocol/GPU_VIPER-TCC.sm
parentdd3fc1f996679f4cfd29f980d43a0652542e6d9b (diff)
downloadgem5-12db50c89584938839e035da47d206250cbfd7c2.tar.xz
ruby: Add support for address ranges in the directory
Previously the directory covered a flat address range that always started from address 0. This change adds a vector of address ranges with interleaving and hashing that each directory keeps track of and the necessary flexibility to support systems with non continuous memory ranges. Change-Id: I6ea1c629bdf4c5137b7d9c89dbaf6c826adfd977 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/2903 Reviewed-by: Bradford Beckmann <brad.beckmann@amd.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Jason Lowe-Power <jason@lowepower.com>
Diffstat (limited to 'src/mem/protocol/GPU_VIPER-TCC.sm')
-rw-r--r--src/mem/protocol/GPU_VIPER-TCC.sm12
1 files changed, 6 insertions, 6 deletions
diff --git a/src/mem/protocol/GPU_VIPER-TCC.sm b/src/mem/protocol/GPU_VIPER-TCC.sm
index f62df9f4f..e21e98030 100644
--- a/src/mem/protocol/GPU_VIPER-TCC.sm
+++ b/src/mem/protocol/GPU_VIPER-TCC.sm
@@ -366,7 +366,7 @@ machine(MachineType:TCC, "TCC Cache")
}
enqueue(unblockToNB_out, UnblockMsg, 1) {
out_msg.addr := address;
- out_msg.Destination.add(map_Address_to_Directory(address));
+ out_msg.Destination.add(mapAddressToMachine(address, MachineType:Directory));
out_msg.MessageSize := MessageSizeType:Unblock_Control;
DPRINTF(RubySlicc, "%s\n", out_msg);
}
@@ -380,7 +380,7 @@ machine(MachineType:TCC, "TCC Cache")
out_msg.addr := address;
out_msg.Type := in_msg.Type;
out_msg.Requestor := machineID;
- out_msg.Destination.add(map_Address_to_Directory(address));
+ out_msg.Destination.add(mapAddressToMachine(address, MachineType:Directory));
out_msg.Shared := false; // unneeded for this request
out_msg.MessageSize := in_msg.MessageSize;
DPRINTF(RubySlicc, "%s\n", out_msg);
@@ -479,7 +479,7 @@ machine(MachineType:TCC, "TCC Cache")
out_msg.addr := address;
out_msg.Requestor := machineID;
out_msg.WTRequestor := in_msg.Requestor;
- out_msg.Destination.add(map_Address_to_Directory(address));
+ out_msg.Destination.add(mapAddressToMachine(address, MachineType:Directory));
out_msg.MessageSize := MessageSizeType:Data;
out_msg.Type := CoherenceRequestType:WriteThrough;
out_msg.Dirty := true;
@@ -494,7 +494,7 @@ machine(MachineType:TCC, "TCC Cache")
out_msg.addr := address;
out_msg.Requestor := machineID;
out_msg.WTRequestor := machineID;
- out_msg.Destination.add(map_Address_to_Directory(address));
+ out_msg.Destination.add(mapAddressToMachine(address, MachineType:Directory));
out_msg.MessageSize := MessageSizeType:Data;
out_msg.Type := CoherenceRequestType:WriteThrough;
out_msg.Dirty := true;
@@ -509,7 +509,7 @@ machine(MachineType:TCC, "TCC Cache")
out_msg.addr := address;
out_msg.Requestor := machineID;
out_msg.WTRequestor := in_msg.Requestor;
- out_msg.Destination.add(map_Address_to_Directory(address));
+ out_msg.Destination.add(mapAddressToMachine(address, MachineType:Directory));
out_msg.MessageSize := MessageSizeType:Data;
out_msg.Type := CoherenceRequestType:Atomic;
out_msg.Dirty := true;
@@ -523,7 +523,7 @@ machine(MachineType:TCC, "TCC Cache")
out_msg.addr := address;
out_msg.Type := CoherenceResponseType:CPUPrbResp; // TCC, L3 respond in same way to probes
out_msg.Sender := machineID;
- out_msg.Destination.add(map_Address_to_Directory(address));
+ out_msg.Destination.add(mapAddressToMachine(address, MachineType:Directory));
out_msg.Dirty := false;
out_msg.Hit := false;
out_msg.Ntsl := true;