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| author | Nilay Vaish <nilay@cs.wisc.edu> | 2013-02-10 21:26:24 -0600 |
|---|---|---|
| committer | Nilay Vaish <nilay@cs.wisc.edu> | 2013-02-10 21:26:24 -0600 |
| commit | d3aebe1f91aa166329c8ee102fdcb2c9734fdceb (patch) | |
| tree | f6f7807c24eccde98ee1e4bfe4c9c24b3c9392b2 /src/mem/protocol/MESI_CMP_directory-L1cache.sm | |
| parent | affd77ea77860fa9231aba8e43ad95dea06a114a (diff) | |
| download | gem5-d3aebe1f91aa166329c8ee102fdcb2c9734fdceb.tar.xz | |
ruby: replaces Time with Cycles in many places
The patch started of with replacing Time with Cycles in the Consumer class.
But to get ruby to compile, the rest of the changes had to be carried out.
Subsequent patches will further this process, till we completely replace
Time with Cycles.
Diffstat (limited to 'src/mem/protocol/MESI_CMP_directory-L1cache.sm')
| -rw-r--r-- | src/mem/protocol/MESI_CMP_directory-L1cache.sm | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/mem/protocol/MESI_CMP_directory-L1cache.sm b/src/mem/protocol/MESI_CMP_directory-L1cache.sm index bcfb20297..113421842 100644 --- a/src/mem/protocol/MESI_CMP_directory-L1cache.sm +++ b/src/mem/protocol/MESI_CMP_directory-L1cache.sm @@ -33,9 +33,9 @@ machine(L1Cache, "MESI Directory L1 Cache CMP") CacheMemory * L1DcacheMemory, Prefetcher * prefetcher = 'NULL', int l2_select_num_bits, - int l1_request_latency = 2, - int l1_response_latency = 2, - int to_l2_latency = 1, + Cycles l1_request_latency = 2, + Cycles l1_response_latency = 2, + Cycles to_l2_latency = 1, bool send_evictions, bool enable_prefetch = "False" { |