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authorNilay Vaish <nilay@cs.wisc.edu>2015-09-18 13:27:47 -0500
committerNilay Vaish <nilay@cs.wisc.edu>2015-09-18 13:27:47 -0500
commit96c999fe88a5f600a1a5ddf8c15eadba3051508b (patch)
treeb1fb5220ffcd3b0688d53cb7f41a6c016eadc0fa /src/mem/protocol/MESI_Two_Level-L1cache.sm
parent216529bf182f58830cfccad090f348e1b8730675 (diff)
downloadgem5-96c999fe88a5f600a1a5ddf8c15eadba3051508b.tar.xz
ruby: print addresses in hex
Changeset 4872dbdea907 replaced Address by Addr, but did not make changes to print statements. So the addresses which were being printed in hex earlier along with their line address, were now being printed in decimals. This patch adds a function printAddress(Addr) that can be used to print the address in hex along with the lines address. This function has been put to use in some of the places. At other places, change has been made to print just the address in hex.
Diffstat (limited to 'src/mem/protocol/MESI_Two_Level-L1cache.sm')
-rw-r--r--src/mem/protocol/MESI_Two_Level-L1cache.sm20
1 files changed, 10 insertions, 10 deletions
diff --git a/src/mem/protocol/MESI_Two_Level-L1cache.sm b/src/mem/protocol/MESI_Two_Level-L1cache.sm
index c40a47cae..b8a4c6220 100644
--- a/src/mem/protocol/MESI_Two_Level-L1cache.sm
+++ b/src/mem/protocol/MESI_Two_Level-L1cache.sm
@@ -528,7 +528,7 @@ machine(L1Cache, "MESI Directory L1 Cache CMP")
out_msg.Requestor := machineID;
out_msg.Destination.add(mapAddressToRange(address, MachineType:L2Cache,
l2_select_low_bit, l2_select_num_bits, intToID(0)));
- DPRINTF(RubySlicc, "address: %s, destination: %s\n",
+ DPRINTF(RubySlicc, "address: %#x, destination: %s\n",
address, out_msg.Destination);
out_msg.MessageSize := MessageSizeType:Control;
out_msg.Prefetch := in_msg.Prefetch;
@@ -545,7 +545,7 @@ machine(L1Cache, "MESI Directory L1 Cache CMP")
out_msg.Requestor := machineID;
out_msg.Destination.add(mapAddressToRange(address, MachineType:L2Cache,
l2_select_low_bit, l2_select_num_bits, intToID(0)));
- DPRINTF(RubySlicc, "address: %s, destination: %s\n",
+ DPRINTF(RubySlicc, "address: %#x, destination: %s\n",
address, out_msg.Destination);
out_msg.MessageSize := MessageSizeType:Control;
out_msg.Prefetch := in_msg.Prefetch;
@@ -562,7 +562,7 @@ machine(L1Cache, "MESI Directory L1 Cache CMP")
out_msg.Requestor := machineID;
out_msg.Destination.add(mapAddressToRange(address, MachineType:L2Cache,
l2_select_low_bit, l2_select_num_bits, intToID(0)));
- DPRINTF(RubySlicc, "address: %s, destination: %s\n",
+ DPRINTF(RubySlicc, "address: %#x, destination: %s\n",
address, out_msg.Destination);
out_msg.MessageSize := MessageSizeType:Control;
out_msg.Prefetch := in_msg.Prefetch;
@@ -585,7 +585,7 @@ machine(L1Cache, "MESI Directory L1 Cache CMP")
out_msg.Prefetch := in_msg.Prefetch;
out_msg.AccessMode := in_msg.AccessMode;
- DPRINTF(RubySlicc, "address: %s, destination: %s\n",
+ DPRINTF(RubySlicc, "address: %#x, destination: %s\n",
address, out_msg.Destination);
}
}
@@ -600,7 +600,7 @@ machine(L1Cache, "MESI Directory L1 Cache CMP")
DPRINTF(RubySlicc, "%s\n", machineID);
out_msg.Destination.add(mapAddressToRange(address, MachineType:L2Cache,
l2_select_low_bit, l2_select_num_bits, intToID(0)));
- DPRINTF(RubySlicc, "address: %s, destination: %s\n",
+ DPRINTF(RubySlicc, "address: %#x, destination: %s\n",
address, out_msg.Destination);
out_msg.MessageSize := MessageSizeType:Control;
out_msg.Prefetch := in_msg.Prefetch;
@@ -620,7 +620,7 @@ machine(L1Cache, "MESI Directory L1 Cache CMP")
out_msg.Destination.add(mapAddressToRange(address, MachineType:L2Cache,
l2_select_low_bit, l2_select_num_bits, intToID(0)));
- DPRINTF(RubySlicc, "address: %s, destination: %s\n",
+ DPRINTF(RubySlicc, "address: %#x, destination: %s\n",
address, out_msg.Destination);
out_msg.MessageSize := MessageSizeType:Control;
out_msg.Prefetch := in_msg.Prefetch;
@@ -637,7 +637,7 @@ machine(L1Cache, "MESI Directory L1 Cache CMP")
out_msg.Requestor := machineID;
out_msg.Destination.add(mapAddressToRange(address, MachineType:L2Cache,
l2_select_low_bit, l2_select_num_bits, intToID(0)));
- DPRINTF(RubySlicc, "address: %s, destination: %s\n",
+ DPRINTF(RubySlicc, "address: %#x, destination: %s\n",
address, out_msg.Destination);
out_msg.MessageSize := MessageSizeType:Control;
out_msg.Prefetch := in_msg.Prefetch;
@@ -759,7 +759,7 @@ machine(L1Cache, "MESI Directory L1 Cache CMP")
action(forward_eviction_to_cpu, "\cc", desc="sends eviction information to the processor") {
if (send_evictions) {
- DPRINTF(RubySlicc, "Sending invalidation for %s to the CPU\n", address);
+ DPRINTF(RubySlicc, "Sending invalidation for %#x to the CPU\n", address);
sequencer.evictionCallback(address);
}
}
@@ -790,7 +790,7 @@ machine(L1Cache, "MESI Directory L1 Cache CMP")
out_msg.Destination.add(mapAddressToRange(address, MachineType:L2Cache,
l2_select_low_bit, l2_select_num_bits, intToID(0)));
out_msg.MessageSize := MessageSizeType:Response_Control;
- DPRINTF(RubySlicc, "%s\n", address);
+ DPRINTF(RubySlicc, "%#x\n", address);
}
}
@@ -802,7 +802,7 @@ machine(L1Cache, "MESI Directory L1 Cache CMP")
out_msg.Destination.add(mapAddressToRange(address, MachineType:L2Cache,
l2_select_low_bit, l2_select_num_bits, intToID(0)));
out_msg.MessageSize := MessageSizeType:Response_Control;
- DPRINTF(RubySlicc, "%s\n", address);
+ DPRINTF(RubySlicc, "%#x\n", address);
}
}