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author | Nilay Vaish <nilay@cs.wisc.edu> | 2014-11-06 05:42:20 -0600 |
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committer | Nilay Vaish <nilay@cs.wisc.edu> | 2014-11-06 05:42:20 -0600 |
commit | d25b722e4a9500f2d4b2ca937900bf093242ddfa (patch) | |
tree | 8eaa415786c9f2ac2ffff67799068381fdbaf90f /src/mem/protocol/MESI_Two_Level-dma.sm | |
parent | 0baaed60ab961b8eb3399ee2c34adeea7335f5b3 (diff) | |
download | gem5-d25b722e4a9500f2d4b2ca937900bf093242ddfa.tar.xz |
ruby: coherence protocols: remove data block from dirctory entry
This patch removes the data block present in the directory entry structure
of each protocol in gem5's mainline. Firstly, this is required for moving
towards common set of memory controllers for classic and ruby memory systems.
Secondly, the data block was being misused in several places. It was being
used for having free access to the physical memory instead of calling on the
memory controller.
From now on, the directory controller will not have a direct visibility into
the physical memory. The Memory Vector object now resides in the
Memory Controller class. This also means that some significant changes are
being made to the functional accesses in ruby.
Diffstat (limited to 'src/mem/protocol/MESI_Two_Level-dma.sm')
-rw-r--r-- | src/mem/protocol/MESI_Two_Level-dma.sm | 11 |
1 files changed, 8 insertions, 3 deletions
diff --git a/src/mem/protocol/MESI_Two_Level-dma.sm b/src/mem/protocol/MESI_Two_Level-dma.sm index 845d4df2f..3d9f2336f 100644 --- a/src/mem/protocol/MESI_Two_Level-dma.sm +++ b/src/mem/protocol/MESI_Two_Level-dma.sm @@ -55,8 +55,9 @@ machine(DMA, "DMA Controller") State getState(Address addr) { return cur_state; } + void setState(Address addr, State state) { - cur_state := state; + cur_state := state; } AccessPermission getAccessPermission(Address addr) { @@ -66,8 +67,12 @@ machine(DMA, "DMA Controller") void setAccessPermission(Address addr, State state) { } - DataBlock getDataBlock(Address addr), return_by_ref="yes" { - error("DMA does not support get data block."); + void functionalRead(Address addr, Packet *pkt) { + error("DMA does not support functional read."); + } + + int functionalWrite(Address addr, Packet *pkt) { + error("DMA does not support functional write."); } out_port(requestToDir_out, RequestMsg, requestToDir, desc="..."); |