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| author | Nilay Vaish <nilay@cs.wisc.edu> | 2010-12-01 11:30:04 -0800 |
|---|---|---|
| committer | Nilay Vaish <nilay@cs.wisc.edu> | 2010-12-01 11:30:04 -0800 |
| commit | 658849d101c98b6d8c7a06f41ffbe39675848eac (patch) | |
| tree | 7a47868ca2c4c61887730db571d24feadc8c04de /src/mem/protocol/MI_example-cache.sm | |
| parent | 0f039fe447c9b1a6e885d8e5e794c25c10da39b9 (diff) | |
| download | gem5-658849d101c98b6d8c7a06f41ffbe39675848eac.tar.xz | |
ruby: Converted old ruby debug calls to M5 debug calls
This patch developed by Nilay Vaish converts all the old GEMS-style ruby
debug calls to the appropriate M5 debug calls.
Diffstat (limited to 'src/mem/protocol/MI_example-cache.sm')
| -rw-r--r-- | src/mem/protocol/MI_example-cache.sm | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/mem/protocol/MI_example-cache.sm b/src/mem/protocol/MI_example-cache.sm index 84975ffd5..8232e93e1 100644 --- a/src/mem/protocol/MI_example-cache.sm +++ b/src/mem/protocol/MI_example-cache.sm @@ -273,7 +273,7 @@ machine(L1Cache, "MI Example L1 Cache") } action(r_load_hit, "r", desc="Notify sequencer the load completed.") { - DEBUG_EXPR(getCacheEntry(address).DataBlk); + DPRINTF(RubySlicc,"%s\n", getCacheEntry(address).DataBlk); sequencer.readCallback(address, GenericMachineType:L1Cache, getCacheEntry(address).DataBlk); @@ -281,7 +281,7 @@ machine(L1Cache, "MI Example L1 Cache") action(rx_load_hit, "rx", desc="External load completed.") { peek(responseNetwork_in, ResponseMsg) { - DEBUG_EXPR(getCacheEntry(address).DataBlk); + DPRINTF(RubySlicc,"%s\n", getCacheEntry(address).DataBlk); sequencer.readCallback(address, getNondirectHitMachType(in_msg.Sender), getCacheEntry(address).DataBlk); @@ -289,7 +289,7 @@ machine(L1Cache, "MI Example L1 Cache") } action(s_store_hit, "s", desc="Notify sequencer that store completed.") { - DEBUG_EXPR(getCacheEntry(address).DataBlk); + DPRINTF(RubySlicc,"%s\n", getCacheEntry(address).DataBlk); sequencer.writeCallback(address, GenericMachineType:L1Cache, getCacheEntry(address).DataBlk); @@ -297,7 +297,7 @@ machine(L1Cache, "MI Example L1 Cache") action(sx_store_hit, "sx", desc="External store completed.") { peek(responseNetwork_in, ResponseMsg) { - DEBUG_EXPR(getCacheEntry(address).DataBlk); + DPRINTF(RubySlicc,"%s\n", getCacheEntry(address).DataBlk); sequencer.writeCallback(address, getNondirectHitMachType(in_msg.Sender), getCacheEntry(address).DataBlk); |