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author | Nilay Vaish <nilay@cs.wisc.edu> | 2011-03-22 06:41:54 -0500 |
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committer | Nilay Vaish <nilay@cs.wisc.edu> | 2011-03-22 06:41:54 -0500 |
commit | 1764ebbf30cfd94eb7ccc618ade0d70049db000e (patch) | |
tree | 3c400317f716fcf50c996e9f4fb03980efd9cf3a /src/mem/protocol/MI_example-cache.sm | |
parent | 46cce440be4999cfdedebbf190c83570ba9f1b49 (diff) | |
download | gem5-1764ebbf30cfd94eb7ccc618ade0d70049db000e.tar.xz |
Ruby: Remove CacheMsg class from SLICC
The goal of the patch is to do away with the CacheMsg class currently in use
in coherence protocols. In place of CacheMsg, the RubyRequest class will used.
This class is already present in slicc_interface/RubyRequest.hh. In fact,
objects of class CacheMsg are generated by copying values from a RubyRequest
object.
Diffstat (limited to 'src/mem/protocol/MI_example-cache.sm')
-rw-r--r-- | src/mem/protocol/MI_example-cache.sm | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/mem/protocol/MI_example-cache.sm b/src/mem/protocol/MI_example-cache.sm index 7923ef65c..7adadbade 100644 --- a/src/mem/protocol/MI_example-cache.sm +++ b/src/mem/protocol/MI_example-cache.sm @@ -181,9 +181,9 @@ machine(L1Cache, "MI Example L1 Cache") } // Mandatory Queue - in_port(mandatoryQueue_in, CacheMsg, mandatoryQueue, desc="...") { + in_port(mandatoryQueue_in, RubyRequest, mandatoryQueue, desc="...") { if (mandatoryQueue_in.isReady()) { - peek(mandatoryQueue_in, CacheMsg, block_on="LineAddress") { + peek(mandatoryQueue_in, RubyRequest, block_on="LineAddress") { Entry cache_entry := getCacheEntry(in_msg.LineAddress); if (is_invalid(cache_entry) && @@ -281,7 +281,7 @@ machine(L1Cache, "MI Example L1 Cache") } action(p_profileMiss, "p", desc="Profile cache miss") { - peek(mandatoryQueue_in, CacheMsg) { + peek(mandatoryQueue_in, RubyRequest) { cacheMemory.profileMiss(in_msg); } } |