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| author | Brad Beckmann <Brad.Beckmann@amd.com> | 2010-01-29 20:29:24 -0800 |
|---|---|---|
| committer | Brad Beckmann <Brad.Beckmann@amd.com> | 2010-01-29 20:29:24 -0800 |
| commit | b3d195153e243fcb3ecb7f42958cec75ed3cdd6f (patch) | |
| tree | 5c3d355bd7d037c2d7f5e66214b5c57093a7b87c /src/mem/protocol/MI_example-dma.sm | |
| parent | 502b8bd8a4f3b1998afbd3cf8e59e0bb4e153403 (diff) | |
| download | gem5-b3d195153e243fcb3ecb7f42958cec75ed3cdd6f.tar.xz | |
ruby: MI_example updates to use the new config system
Diffstat (limited to 'src/mem/protocol/MI_example-dma.sm')
| -rw-r--r-- | src/mem/protocol/MI_example-dma.sm | 9 |
1 files changed, 2 insertions, 7 deletions
diff --git a/src/mem/protocol/MI_example-dma.sm b/src/mem/protocol/MI_example-dma.sm index 79c42e719..17060dd4d 100644 --- a/src/mem/protocol/MI_example-dma.sm +++ b/src/mem/protocol/MI_example-dma.sm @@ -1,6 +1,7 @@ machine(DMA, "DMA Controller") -: int request_latency +: DMASequencer * dma_sequencer, + int request_latency { MessageBuffer responseFromDir, network="From", virtual_network="4", ordered="true", no_vector="true"; @@ -19,13 +20,7 @@ machine(DMA, "DMA Controller") Ack, desc="DMA write to memory completed"; } - external_type(DMASequencer) { - void ackCallback(); - void dataCallback(DataBlock); - } - MessageBuffer mandatoryQueue, ordered="false", no_vector="true"; - DMASequencer dma_sequencer, factory='RubySystem::getDMASequencer(m_cfg["dma_sequencer"])', no_vector="true"; State cur_state, no_vector="true"; State getState(Address addr) { |