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authorNikos Nikoleris <nikos.nikoleris@arm.com>2017-03-13 18:19:08 +0000
committerNikos Nikoleris <nikos.nikoleris@arm.com>2017-06-13 15:52:32 +0000
commit12db50c89584938839e035da47d206250cbfd7c2 (patch)
tree831a4151b29cdc14958b8dab2cce97fc3136d7b6 /src/mem/protocol/MOESI_AMD_Base-CorePair.sm
parentdd3fc1f996679f4cfd29f980d43a0652542e6d9b (diff)
downloadgem5-12db50c89584938839e035da47d206250cbfd7c2.tar.xz
ruby: Add support for address ranges in the directory
Previously the directory covered a flat address range that always started from address 0. This change adds a vector of address ranges with interleaving and hashing that each directory keeps track of and the necessary flexibility to support systems with non continuous memory ranges. Change-Id: I6ea1c629bdf4c5137b7d9c89dbaf6c826adfd977 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/2903 Reviewed-by: Bradford Beckmann <brad.beckmann@amd.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Jason Lowe-Power <jason@lowepower.com>
Diffstat (limited to 'src/mem/protocol/MOESI_AMD_Base-CorePair.sm')
-rw-r--r--src/mem/protocol/MOESI_AMD_Base-CorePair.sm37
1 files changed, 22 insertions, 15 deletions
diff --git a/src/mem/protocol/MOESI_AMD_Base-CorePair.sm b/src/mem/protocol/MOESI_AMD_Base-CorePair.sm
index 76fe77230..b77f3723a 100644
--- a/src/mem/protocol/MOESI_AMD_Base-CorePair.sm
+++ b/src/mem/protocol/MOESI_AMD_Base-CorePair.sm
@@ -230,6 +230,7 @@ machine(MachineType:CorePair, "CP-like Core Coherence")
void wakeUpAllBuffers();
void wakeUpBuffers(Addr a);
Cycles curCycle();
+ MachineID mapAddressToMachine(Addr addr, MachineType mtype);
// END STRUCTURE DEFINITIONS
@@ -690,7 +691,7 @@ machine(MachineType:CorePair, "CP-like Core Coherence")
out_msg.addr := address;
out_msg.Type := CoherenceRequestType:RdBlk;
out_msg.Requestor := machineID;
- out_msg.Destination.add(map_Address_to_Directory(address));
+ out_msg.Destination.add(mapAddressToMachine(address, MachineType:Directory));
DPRINTF(RubySlicc,"%s\n",out_msg.Destination);
out_msg.MessageSize := MessageSizeType:Request_Control;
out_msg.InitialRequestTime := curCycle();
@@ -702,7 +703,7 @@ machine(MachineType:CorePair, "CP-like Core Coherence")
out_msg.addr := address;
out_msg.Type := CoherenceRequestType:RdBlkM;
out_msg.Requestor := machineID;
- out_msg.Destination.add(map_Address_to_Directory(address));
+ out_msg.Destination.add(mapAddressToMachine(address, MachineType:Directory));
out_msg.MessageSize := MessageSizeType:Request_Control;
out_msg.InitialRequestTime := curCycle();
}
@@ -713,7 +714,7 @@ machine(MachineType:CorePair, "CP-like Core Coherence")
out_msg.addr := address;
out_msg.Type := CoherenceRequestType:RdBlkS;
out_msg.Requestor := machineID;
- out_msg.Destination.add(map_Address_to_Directory(address));
+ out_msg.Destination.add(mapAddressToMachine(address, MachineType:Directory));
out_msg.MessageSize := MessageSizeType:Request_Control;
out_msg.InitialRequestTime := curCycle();
}
@@ -726,7 +727,7 @@ machine(MachineType:CorePair, "CP-like Core Coherence")
assert(is_valid(cache_entry));
out_msg.DataBlk := cache_entry.DataBlk;
assert(cache_entry.Dirty);
- out_msg.Destination.add(map_Address_to_Directory(address));
+ out_msg.Destination.add(mapAddressToMachine(address, MachineType:Directory));
out_msg.MessageSize := MessageSizeType:Request_Control;
out_msg.Type := CoherenceRequestType:VicDirty;
out_msg.InitialRequestTime := curCycle();
@@ -742,7 +743,7 @@ machine(MachineType:CorePair, "CP-like Core Coherence")
enqueue(requestNetwork_out, CPURequestMsg, issue_latency) {
out_msg.addr := address;
out_msg.Requestor := machineID;
- out_msg.Destination.add(map_Address_to_Directory(address));
+ out_msg.Destination.add(mapAddressToMachine(address, MachineType:Directory));
out_msg.MessageSize := MessageSizeType:Request_Control;
out_msg.Type := CoherenceRequestType:VicClean;
out_msg.InitialRequestTime := curCycle();
@@ -1104,7 +1105,7 @@ machine(MachineType:CorePair, "CP-like Core Coherence")
out_msg.addr := address;
out_msg.Type := CoherenceResponseType:StaleNotif;
out_msg.Sender := machineID;
- out_msg.Destination.add(map_Address_to_Directory(address));
+ out_msg.Destination.add(mapAddressToMachine(address, MachineType:Directory));
out_msg.MessageSize := MessageSizeType:Response_Control;
DPRINTF(RubySlicc, "%s\n", out_msg);
}
@@ -1117,7 +1118,7 @@ machine(MachineType:CorePair, "CP-like Core Coherence")
out_msg.addr := address;
out_msg.Type := CoherenceResponseType:CPUData;
out_msg.Sender := machineID;
- out_msg.Destination.add(map_Address_to_Directory(address));
+ out_msg.Destination.add(mapAddressToMachine(address, MachineType:Directory));
out_msg.DataBlk := tbe.DataBlk;
out_msg.Dirty := tbe.Dirty;
if (tbe.Shared) {
@@ -1137,7 +1138,8 @@ machine(MachineType:CorePair, "CP-like Core Coherence")
out_msg.addr := address;
out_msg.Type := CoherenceResponseType:CPUPrbResp; // L3 and CPUs respond in same way to probes
out_msg.Sender := machineID;
- out_msg.Destination.add(map_Address_to_Directory(address)); // will this always be ok? probably not for multisocket
+ // will this always be ok? probably not for multisocket
+ out_msg.Destination.add(mapAddressToMachine(address, MachineType:Directory));
out_msg.Dirty := false;
out_msg.Hit := false;
out_msg.Ntsl := true;
@@ -1151,7 +1153,8 @@ machine(MachineType:CorePair, "CP-like Core Coherence")
out_msg.addr := address;
out_msg.Type := CoherenceResponseType:CPUPrbResp; // L3 and CPUs respond in same way to probes
out_msg.Sender := machineID;
- out_msg.Destination.add(map_Address_to_Directory(address)); // will this always be ok? probably not for multisocket
+ // will this always be ok? probably not for multisocket
+ out_msg.Destination.add(mapAddressToMachine(address, MachineType:Directory));
out_msg.Dirty := false;
out_msg.Ntsl := true;
out_msg.Hit := false;
@@ -1165,7 +1168,8 @@ machine(MachineType:CorePair, "CP-like Core Coherence")
out_msg.addr := address;
out_msg.Type := CoherenceResponseType:CPUPrbResp; // L3 and CPUs respond in same way to probes
out_msg.Sender := machineID;
- out_msg.Destination.add(map_Address_to_Directory(address)); // will this always be ok? probably not for multisocket
+ // will this always be ok? probably not for multisocket
+ out_msg.Destination.add(mapAddressToMachine(address, MachineType:Directory));
assert(addressInCore(address) || is_valid(tbe));
out_msg.Dirty := false; // only true if sending back data i think
out_msg.Hit := true;
@@ -1180,7 +1184,8 @@ machine(MachineType:CorePair, "CP-like Core Coherence")
out_msg.addr := address;
out_msg.Type := CoherenceResponseType:CPUPrbResp; // L3 and CPUs respond in same way to probes
out_msg.Sender := machineID;
- out_msg.Destination.add(map_Address_to_Directory(address)); // will this always be ok? probably not for multisocket
+ // will this always be ok? probably not for multisocket
+ out_msg.Destination.add(mapAddressToMachine(address, MachineType:Directory));
if (addressInCore(address)) {
out_msg.Hit := true;
} else {
@@ -1199,7 +1204,8 @@ machine(MachineType:CorePair, "CP-like Core Coherence")
out_msg.addr := address;
out_msg.Type := CoherenceResponseType:CPUPrbResp;
out_msg.Sender := machineID;
- out_msg.Destination.add(map_Address_to_Directory(address)); // will this always be ok? probably not for multisocket
+ // will this always be ok? probably not for multisocket
+ out_msg.Destination.add(mapAddressToMachine(address, MachineType:Directory));
out_msg.DataBlk := cache_entry.DataBlk;
assert(cache_entry.Dirty);
out_msg.Dirty := true;
@@ -1215,7 +1221,8 @@ machine(MachineType:CorePair, "CP-like Core Coherence")
out_msg.addr := address;
out_msg.Type := CoherenceResponseType:CPUPrbResp;
out_msg.Sender := machineID;
- out_msg.Destination.add(map_Address_to_Directory(address)); // will this always be ok? probably not for multisocket
+ // will this always be ok? probably not for multisocket
+ out_msg.Destination.add(mapAddressToMachine(address, MachineType:Directory));
out_msg.DataBlk := cache_entry.DataBlk;
assert(cache_entry.Dirty);
out_msg.Dirty := true;
@@ -1231,7 +1238,7 @@ machine(MachineType:CorePair, "CP-like Core Coherence")
out_msg.addr := address;
out_msg.Type := CoherenceResponseType:CPUPrbResp;
out_msg.Sender := machineID;
- out_msg.Destination.add(map_Address_to_Directory(address));
+ out_msg.Destination.add(mapAddressToMachine(address, MachineType:Directory));
out_msg.DataBlk := tbe.DataBlk;
assert(tbe.Dirty);
out_msg.Dirty := true;
@@ -1249,7 +1256,7 @@ machine(MachineType:CorePair, "CP-like Core Coherence")
action(uu_sendUnblock, "uu", desc="state changed, unblock") {
enqueue(unblockNetwork_out, UnblockMsg, issue_latency) {
out_msg.addr := address;
- out_msg.Destination.add(map_Address_to_Directory(address));
+ out_msg.Destination.add(mapAddressToMachine(address, MachineType:Directory));
out_msg.MessageSize := MessageSizeType:Unblock_Control;
DPRINTF(RubySlicc, "%s\n", out_msg);
}