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author | Joel Hestness <jthestness@gmail.com> | 2015-08-14 00:19:45 -0500 |
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committer | Joel Hestness <jthestness@gmail.com> | 2015-08-14 00:19:45 -0500 |
commit | 905c0b347c785d07b606b6a9f3c6bbdf8ebe96a7 (patch) | |
tree | e04c0fe6cf9ff037281e618a808bd390c6457f5b /src/mem/protocol/MOESI_CMP_directory-L1cache.sm | |
parent | 581bae9ecbafd5e94c5405ca925a55cc6e5d7488 (diff) | |
download | gem5-905c0b347c785d07b606b6a9f3c6bbdf8ebe96a7.tar.xz |
ruby: Protocol changes for SimObject MessageBuffers
Diffstat (limited to 'src/mem/protocol/MOESI_CMP_directory-L1cache.sm')
-rw-r--r-- | src/mem/protocol/MOESI_CMP_directory-L1cache.sm | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/src/mem/protocol/MOESI_CMP_directory-L1cache.sm b/src/mem/protocol/MOESI_CMP_directory-L1cache.sm index e9b05a0c8..a8c9c5d1d 100644 --- a/src/mem/protocol/MOESI_CMP_directory-L1cache.sm +++ b/src/mem/protocol/MOESI_CMP_directory-L1cache.sm @@ -39,18 +39,18 @@ machine(L1Cache, "Directory protocol") // From this node's L1 cache TO the network // a local L1 -> this L2 bank, currently ordered with directory forwarded requests MessageBuffer * requestFromL1Cache, network="To", virtual_network="0", - ordered="false", vnet_type="request"; + vnet_type="request"; // a local L1 -> this L2 bank MessageBuffer * responseFromL1Cache, network="To", virtual_network="2", - ordered="false", vnet_type="response"; + vnet_type="response"; // To this node's L1 cache FROM the network // a L2 bank -> this L1 MessageBuffer * requestToL1Cache, network="From", virtual_network="0", - ordered="false", vnet_type="request"; + vnet_type="request"; // a L2 bank -> this L1 MessageBuffer * responseToL1Cache, network="From", virtual_network="2", - ordered="false", vnet_type="response"; + vnet_type="response"; { // STATES state_declaration(State, desc="Cache states", default="L1Cache_State_I") { @@ -134,7 +134,7 @@ machine(L1Cache, "Directory protocol") void set_tbe(TBE b); void unset_tbe(); - MessageBuffer mandatoryQueue, ordered="false", abstract_chip_ptr="true"; + MessageBuffer mandatoryQueue, abstract_chip_ptr="true"; TBETable TBEs, template="<L1Cache_TBE>", constructor="m_number_of_TBEs"; TimerTable useTimerTable; @@ -254,7 +254,7 @@ machine(L1Cache, "Directory protocol") } } - MessageBuffer triggerQueue, ordered="true"; + MessageBuffer triggerQueue; // ** OUT_PORTS ** |