summaryrefslogtreecommitdiff
path: root/src/mem/protocol/MOESI_CMP_directory-L1cache.sm
diff options
context:
space:
mode:
authorNilay Vaish <nilay@cs.wisc.edu>2011-03-19 18:34:59 -0500
committerNilay Vaish <nilay@cs.wisc.edu>2011-03-19 18:34:59 -0500
commit611f052e963b06b4a7e02b2fc6d847cd6d08d038 (patch)
tree0a3bdb5787d5e6ae9b0e07145cf2d32b4a532d6b /src/mem/protocol/MOESI_CMP_directory-L1cache.sm
parent2f4276448b82b2aa077ae257171b5cb04b7048f6 (diff)
downloadgem5-611f052e963b06b4a7e02b2fc6d847cd6d08d038.tar.xz
Ruby: Convert CacheRequestType to RubyRequestType
This patch converts CacheRequestType to RubyRequestType so that both the protocol dependent and independent code makes use of the same request type.
Diffstat (limited to 'src/mem/protocol/MOESI_CMP_directory-L1cache.sm')
-rw-r--r--src/mem/protocol/MOESI_CMP_directory-L1cache.sm12
1 files changed, 6 insertions, 6 deletions
diff --git a/src/mem/protocol/MOESI_CMP_directory-L1cache.sm b/src/mem/protocol/MOESI_CMP_directory-L1cache.sm
index 310c3027a..291621af9 100644
--- a/src/mem/protocol/MOESI_CMP_directory-L1cache.sm
+++ b/src/mem/protocol/MOESI_CMP_directory-L1cache.sm
@@ -194,15 +194,15 @@ machine(L1Cache, "Directory protocol")
}
}
- Event mandatory_request_type_to_event(CacheRequestType type) {
- if (type == CacheRequestType:LD) {
+ Event mandatory_request_type_to_event(RubyRequestType type) {
+ if (type == RubyRequestType:LD) {
return Event:Load;
- } else if (type == CacheRequestType:IFETCH) {
+ } else if (type == RubyRequestType:IFETCH) {
return Event:Ifetch;
- } else if ((type == CacheRequestType:ST) || (type == CacheRequestType:ATOMIC)) {
+ } else if ((type == RubyRequestType:ST) || (type == RubyRequestType:ATOMIC)) {
return Event:Store;
} else {
- error("Invalid CacheRequestType");
+ error("Invalid RubyRequestType");
}
}
@@ -309,7 +309,7 @@ machine(L1Cache, "Directory protocol")
// Check for data access to blocks in I-cache and ifetchs to blocks in D-cache
- if (in_msg.Type == CacheRequestType:IFETCH) {
+ if (in_msg.Type == RubyRequestType:IFETCH) {
// ** INSTRUCTION ACCESS ***
Entry L1Icache_entry := getL1ICacheEntry(in_msg.LineAddress);