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authorTiago Muck <tiago.muck@arm.com>2019-02-19 18:01:44 -0600
committerTiago Mück <tiago.muck@arm.com>2019-05-14 22:01:12 +0000
commit36e49e2b5bd96d527596707b794fc5f57785c801 (patch)
tree92fa68b3c63e0c9b2e62a5487783503259558966 /src/mem/protocol/MOESI_CMP_directory-L2cache.sm
parent496d5ed3e1f7dad42b0c2ebe0050d84621be8f99 (diff)
downloadgem5-36e49e2b5bd96d527596707b794fc5f57785c801.tar.xz
mem-ruby: Cache latencies for MOESI_CMP_dir
Modified both L1 and L2 controllers to take into account the cache latency parameters. Default values in the configuration script updated as well. Change-Id: I72bb8dd29ee0b02da06e1addf13b266fe4d1e979 Signed-off-by: Tiago Muck <tiago.muck@arm.com> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/18414 Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com> Maintainer: Jason Lowe-Power <jason@lowepower.com>
Diffstat (limited to 'src/mem/protocol/MOESI_CMP_directory-L2cache.sm')
-rw-r--r--src/mem/protocol/MOESI_CMP_directory-L2cache.sm24
1 files changed, 17 insertions, 7 deletions
diff --git a/src/mem/protocol/MOESI_CMP_directory-L2cache.sm b/src/mem/protocol/MOESI_CMP_directory-L2cache.sm
index 53b5a948f..7883a96b2 100644
--- a/src/mem/protocol/MOESI_CMP_directory-L2cache.sm
+++ b/src/mem/protocol/MOESI_CMP_directory-L2cache.sm
@@ -40,8 +40,8 @@
machine(MachineType:L2Cache, "Token protocol")
: CacheMemory * L2cache;
- Cycles response_latency := 2;
- Cycles request_latency := 2;
+ Cycles response_latency := 1;
+ Cycles request_latency := 1;
// L2 BANK QUEUES
// From local bank of L2 cache TO the network
@@ -248,6 +248,16 @@ machine(MachineType:L2Cache, "Token protocol")
MachineID mapAddressToMachine(Addr addr, MachineType mtype);
void wakeUpAllBuffers(Addr a);
+ // Latency for responses that fetch data from cache
+ Cycles cacheResponseLatency() {
+ if (L2cache.getTagLatency() > response_latency) {
+ return L2cache.getTagLatency();
+ }
+ else {
+ return response_latency;
+ }
+ }
+
Entry getCacheEntry(Addr address), return_by_pointer="yes" {
return static_cast(Entry, "pointer", L2cache[address]);
}
@@ -921,7 +931,7 @@ machine(MachineType:L2Cache, "Token protocol")
action(d_sendDataToL1GETS, "d", desc="Send data directly to L1 requestor") {
assert(is_valid(cache_entry));
peek(L1requestNetwork_in, RequestMsg) {
- enqueue(responseNetwork_out, ResponseMsg, response_latency) {
+ enqueue(responseNetwork_out, ResponseMsg, cacheResponseLatency()) {
out_msg.addr := address;
out_msg.Type := CoherenceResponseType:DATA;
out_msg.Sender := machineID;
@@ -941,7 +951,7 @@ machine(MachineType:L2Cache, "Token protocol")
action(d_sendDataToL1GETX, "\d", desc="Send data and a token from TBE to L1 requestor") {
assert(is_valid(cache_entry));
peek(L1requestNetwork_in, RequestMsg) {
- enqueue(responseNetwork_out, ResponseMsg, response_latency) {
+ enqueue(responseNetwork_out, ResponseMsg, cacheResponseLatency()) {
assert(is_valid(tbe));
out_msg.addr := address;
out_msg.Type := CoherenceResponseType:DATA_EXCLUSIVE;
@@ -961,7 +971,7 @@ machine(MachineType:L2Cache, "Token protocol")
action(dd_sendDataToFwdGETX, "dd", desc="send data") {
assert(is_valid(cache_entry));
peek(requestNetwork_in, RequestMsg) {
- enqueue(responseNetwork_out, ResponseMsg, response_latency) {
+ enqueue(responseNetwork_out, ResponseMsg, cacheResponseLatency()) {
out_msg.addr := address;
out_msg.Type := CoherenceResponseType:DATA_EXCLUSIVE;
out_msg.Sender := machineID;
@@ -981,7 +991,7 @@ machine(MachineType:L2Cache, "Token protocol")
action(dd_sendDataToFwdGETS, "\dd", desc="send data") {
assert(is_valid(cache_entry));
peek(requestNetwork_in, RequestMsg) {
- enqueue(responseNetwork_out, ResponseMsg, response_latency) {
+ enqueue(responseNetwork_out, ResponseMsg, cacheResponseLatency()) {
out_msg.addr := address;
out_msg.Type := CoherenceResponseType:DATA;
out_msg.Sender := machineID;
@@ -1001,7 +1011,7 @@ machine(MachineType:L2Cache, "Token protocol")
action(dd_sendExclusiveDataToFwdGETS, "\d\d", desc="send data") {
assert(is_valid(cache_entry));
peek(requestNetwork_in, RequestMsg) {
- enqueue(responseNetwork_out, ResponseMsg, response_latency) {
+ enqueue(responseNetwork_out, ResponseMsg, cacheResponseLatency()) {
out_msg.addr := address;
out_msg.Type := CoherenceResponseType:DATA_EXCLUSIVE;
out_msg.Sender := machineID;