diff options
author | Nilay Vaish <nilay@cs.wisc.edu> | 2014-11-06 05:42:21 -0600 |
---|---|---|
committer | Nilay Vaish <nilay@cs.wisc.edu> | 2014-11-06 05:42:21 -0600 |
commit | 3022d463fbe1f969aadf7284ade996539c9454f9 (patch) | |
tree | 7cd252e05ba750a4abe282db2d53957189e19173 /src/mem/protocol/MOESI_CMP_directory-dir.sm | |
parent | 68ddfab8a4fa6f56c5f8bff6d91facd39abe353b (diff) | |
download | gem5-3022d463fbe1f969aadf7284ade996539c9454f9.tar.xz |
ruby: interface with classic memory controller
This patch is the final in the series. The whole series and this patch in
particular were written with the aim of interfacing ruby's directory controller
with the memory controller in the classic memory system. This is being done
since ruby's memory controller has not being kept up to date with the changes
going on in DRAMs. Classic's memory controller is more up to date and
supports multiple different types of DRAM. This also brings classic and
ruby ever more close. The patch also changes ruby's memory controller to
expose the same interface.
Diffstat (limited to 'src/mem/protocol/MOESI_CMP_directory-dir.sm')
-rw-r--r-- | src/mem/protocol/MOESI_CMP_directory-dir.sm | 85 |
1 files changed, 20 insertions, 65 deletions
diff --git a/src/mem/protocol/MOESI_CMP_directory-dir.sm b/src/mem/protocol/MOESI_CMP_directory-dir.sm index a6b93fa54..3e19897f3 100644 --- a/src/mem/protocol/MOESI_CMP_directory-dir.sm +++ b/src/mem/protocol/MOESI_CMP_directory-dir.sm @@ -28,8 +28,8 @@ machine(Directory, "Directory protocol") : DirectoryMemory * directory; - MemoryControl * memBuffer; Cycles directory_latency := 6; + Cycles to_memory_controller_latency := 1; // Message Queues MessageBuffer * requestToDir, network="From", virtual_network="1", @@ -191,11 +191,13 @@ machine(Directory, "Directory protocol") } void functionalRead(Address addr, Packet *pkt) { - memBuffer.functionalRead(pkt); + functionalMemoryRead(pkt); } int functionalWrite(Address addr, Packet *pkt) { - return memBuffer.functionalWrite(pkt); + int num_functional_writes := 0; + num_functional_writes := num_functional_writes + functionalMemoryWrite(pkt); + return num_functional_writes; } // if no sharers, then directory can be considered @@ -222,7 +224,6 @@ machine(Directory, "Directory protocol") // ** OUT_PORTS ** out_port(forwardNetwork_out, RequestMsg, forwardFromDir); out_port(responseNetwork_out, ResponseMsg, responseFromDir); - out_port(memQueue_out, MemoryMsg, memBuffer); // ** IN_PORTS ** @@ -286,7 +287,7 @@ machine(Directory, "Directory protocol") } // off-chip memory request/response is done - in_port(memQueue_in, MemoryMsg, memBuffer) { + in_port(memQueue_in, MemoryMsg, responseFromMemory) { if (memQueue_in.isReady()) { peek(memQueue_in, MemoryMsg) { if (in_msg.Type == MemoryRequestType:MEMORY_READ) { @@ -465,41 +466,18 @@ machine(Directory, "Directory protocol") action(qf_queueMemoryFetchRequest, "qf", desc="Queue off-chip fetch request") { peek(requestQueue_in, RequestMsg) { - enqueue(memQueue_out, MemoryMsg, 1) { - out_msg.Addr := address; - out_msg.Type := MemoryRequestType:MEMORY_READ; - out_msg.Sender := machineID; - out_msg.OriginalRequestorMachId := in_msg.Requestor; - out_msg.MessageSize := in_msg.MessageSize; - //out_msg.Prefetch := false; - // These are not used by memory but are passed back here with the read data: - out_msg.ReadX := (in_msg.Type == CoherenceRequestType:GETS && - getDirectoryEntry(address).Sharers.count() == 0); - out_msg.Acks := getDirectoryEntry(address).Sharers.count(); - if (getDirectoryEntry(address).Sharers.isElement(in_msg.Requestor)) { - out_msg.Acks := out_msg.Acks - 1; - } - DPRINTF(RubySlicc, "%s\n", out_msg); - } + queueMemoryRead(in_msg.Requestor, address, to_memory_controller_latency); } } action(qw_queueMemoryWBRequest, "qw", desc="Queue off-chip writeback request") { peek(unblockNetwork_in, ResponseMsg) { - enqueue(memQueue_out, MemoryMsg, 1) { - out_msg.Addr := address; - out_msg.Type := MemoryRequestType:MEMORY_WB; - out_msg.Sender := machineID; - if (is_valid(tbe)) { - out_msg.OriginalRequestorMachId := tbe.Requestor; - } - out_msg.DataBlk := in_msg.DataBlk; - out_msg.MessageSize := in_msg.MessageSize; - //out_msg.Prefetch := false; - // Not used: - out_msg.ReadX := false; - out_msg.Acks := getDirectoryEntry(address).Sharers.count(); // for dma requests - DPRINTF(RubySlicc, "%s\n", out_msg); + if (is_valid(tbe)) { + queueMemoryWrite(tbe.Requestor, address, to_memory_controller_latency, + in_msg.DataBlk); + } else { + queueMemoryWrite(in_msg.Sender, address, to_memory_controller_latency, + in_msg.DataBlk); } } } @@ -507,41 +485,18 @@ machine(Directory, "Directory protocol") action(qw_queueMemoryWBRequestFromMessageAndTBE, "qwmt", desc="Queue off-chip writeback request") { peek(unblockNetwork_in, ResponseMsg) { - enqueue(memQueue_out, MemoryMsg, 1) { - out_msg.Addr := address; - out_msg.Type := MemoryRequestType:MEMORY_WB; - out_msg.Sender := machineID; - if (is_valid(tbe)) { - out_msg.OriginalRequestorMachId := tbe.Requestor; - } - out_msg.DataBlk := in_msg.DataBlk; - out_msg.DataBlk.copyPartial(tbe.DataBlk, - addressOffset(tbe.PhysicalAddress), tbe.Len); - - out_msg.MessageSize := in_msg.MessageSize; - // Not used: - out_msg.ReadX := false; - out_msg.Acks := getDirectoryEntry(address).Sharers.count(); // for dma requests - DPRINTF(RubySlicc, "%s\n", out_msg); - } + DataBlock DataBlk := in_msg.DataBlk; + DataBlk.copyPartial(tbe.DataBlk, addressOffset(tbe.PhysicalAddress), + tbe.Len); + queueMemoryWrite(tbe.Requestor, address, to_memory_controller_latency, + DataBlk); } } action(qw_queueMemoryWBRequest2, "/qw", desc="Queue off-chip writeback request") { peek(requestQueue_in, RequestMsg) { - enqueue(memQueue_out, MemoryMsg, 1) { - out_msg.Addr := address; - out_msg.Type := MemoryRequestType:MEMORY_WB; - out_msg.Sender := machineID; - out_msg.OriginalRequestorMachId := in_msg.Requestor; - out_msg.DataBlk := in_msg.DataBlk; - out_msg.MessageSize := in_msg.MessageSize; - //out_msg.Prefetch := false; - // Not used: - out_msg.ReadX := false; - out_msg.Acks := getDirectoryEntry(address).Sharers.count(); // for dma requests - DPRINTF(RubySlicc, "%s\n", out_msg); - } + queueMemoryWrite(in_msg.Requestor, address, to_memory_controller_latency, + in_msg.DataBlk); } } |