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| author | Brad Beckmann <Brad.Beckmann@amd.com> | 2010-01-29 20:29:26 -0800 |
|---|---|---|
| committer | Brad Beckmann <Brad.Beckmann@amd.com> | 2010-01-29 20:29:26 -0800 |
| commit | 31fcf09a68fd2aa680f1d1ce8c83ae9ad4407848 (patch) | |
| tree | 5c10ec08e6b0ef739501f8f3cd146d2988896ee8 /src/mem/protocol/MOESI_CMP_directory-dma.sm | |
| parent | 1c4405ad5eaa2733b677a194c2ea904d5a7ee269 (diff) | |
| download | gem5-31fcf09a68fd2aa680f1d1ce8c83ae9ad4407848.tar.xz | |
ruby: MOESI_CMP_directory updated to the new config system
Diffstat (limited to 'src/mem/protocol/MOESI_CMP_directory-dma.sm')
| -rw-r--r-- | src/mem/protocol/MOESI_CMP_directory-dma.sm | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/mem/protocol/MOESI_CMP_directory-dma.sm b/src/mem/protocol/MOESI_CMP_directory-dma.sm index 6105778bd..673e0c4cb 100644 --- a/src/mem/protocol/MOESI_CMP_directory-dma.sm +++ b/src/mem/protocol/MOESI_CMP_directory-dma.sm @@ -1,7 +1,8 @@ machine(DMA, "DMA Controller") -: int request_latency, - int response_latency +: DMASequencer * dma_sequencer, + int request_latency = 14, + int response_latency = 14 { MessageBuffer goo1, network="From", virtual_network="0", ordered="false"; @@ -47,7 +48,6 @@ machine(DMA, "DMA Controller") MessageBuffer mandatoryQueue, ordered="false"; MessageBuffer triggerQueue, ordered="true"; - DMASequencer dma_sequencer, factory='RubySystem::getDMASequencer(m_cfg["dma_sequencer"])'; TBETable TBEs, template_hack="<DMA_TBE>"; State cur_state; |