summaryrefslogtreecommitdiff
path: root/src/mem/protocol/MOESI_CMP_token-L1cache.sm
diff options
context:
space:
mode:
authorNilay Vaish <nilay@cs.wisc.edu>2013-06-25 00:32:03 -0500
committerNilay Vaish <nilay@cs.wisc.edu>2013-06-25 00:32:03 -0500
commitbeb6e57c6f6141ad959bb97b49daad7f1fa54af3 (patch)
tree3221c7605fee55dc272fc4ba86ad384db9ad41ca /src/mem/protocol/MOESI_CMP_token-L1cache.sm
parentbeee57070a1fecfe4b854af0c525b454a472202f (diff)
downloadgem5-beb6e57c6f6141ad959bb97b49daad7f1fa54af3.tar.xz
ruby: profiler: lots of inter-related changes
The patch started of with removing the global variables from the profiler for profiling the miss latency of requests made to the cache. The corrresponding histograms have been moved to the Sequencer. These are combined together when the histograms are printed. Separate histograms are now maintained for tracking latency of all requests together, of hits only and of misses only. A particular set of histograms used to use the type GenericMachineType defined in one of the protocol files. This patch removes this type. Now, everything that relied on this type would use MachineType instead. To do this, SLICC has been changed so that multiple machine types can be declared by a controller in its preamble.
Diffstat (limited to 'src/mem/protocol/MOESI_CMP_token-L1cache.sm')
-rw-r--r--src/mem/protocol/MOESI_CMP_token-L1cache.sm51
1 files changed, 19 insertions, 32 deletions
diff --git a/src/mem/protocol/MOESI_CMP_token-L1cache.sm b/src/mem/protocol/MOESI_CMP_token-L1cache.sm
index 91e4f355e..e472d0437 100644
--- a/src/mem/protocol/MOESI_CMP_token-L1cache.sm
+++ b/src/mem/protocol/MOESI_CMP_token-L1cache.sm
@@ -399,26 +399,21 @@ machine(L1Cache, "Token protocol")
}
}
- GenericMachineType getNondirectHitMachType(Address addr, MachineID sender) {
+ // NOTE: direct local hits should not call this function
+ bool isExternalHit(Address addr, MachineID sender) {
if (machineIDToMachineType(sender) == MachineType:L1Cache) {
- //
- // NOTE direct local hits should not call this
- //
- return GenericMachineType:L1Cache_wCC;
+ return true;
} else if (machineIDToMachineType(sender) == MachineType:L2Cache) {
- if (sender == (mapAddressToRange(addr,
- MachineType:L2Cache,
- l2_select_low_bit,
- l2_select_num_bits))) {
-
- return GenericMachineType:L2Cache;
+ if (sender == mapAddressToRange(addr, MachineType:L2Cache,
+ l2_select_low_bit, l2_select_num_bits)) {
+ return false;
} else {
- return GenericMachineType:L2Cache_wCC;
+ return true;
}
- } else {
- return ConvertMachToGenericMach(machineIDToMachineType(sender));
}
+
+ return true;
}
bool okToIssueStarving(Address addr, MachineID machineID) {
@@ -1289,10 +1284,8 @@ machine(L1Cache, "Token protocol")
DPRINTF(RubySlicc, "Address: %s, Data Block: %s\n",
address, cache_entry.DataBlk);
- sequencer.readCallback(address,
- GenericMachineType:L1Cache,
- cache_entry.DataBlk);
-
+ sequencer.readCallback(address, cache_entry.DataBlk, false,
+ MachineType:L1Cache);
}
action(x_external_load_hit, "x", desc="Notify sequencer the load completed.") {
@@ -1300,11 +1293,9 @@ machine(L1Cache, "Token protocol")
DPRINTF(RubySlicc, "Address: %s, Data Block: %s\n",
address, cache_entry.DataBlk);
peek(responseNetwork_in, ResponseMsg) {
-
- sequencer.readCallback(address,
- getNondirectHitMachType(address, in_msg.Sender),
- cache_entry.DataBlk);
-
+ sequencer.readCallback(address, cache_entry.DataBlk,
+ isExternalHit(address, in_msg.Sender),
+ machineIDToMachineType(in_msg.Sender));
}
}
@@ -1313,10 +1304,8 @@ machine(L1Cache, "Token protocol")
DPRINTF(RubySlicc, "Address: %s, Data Block: %s\n",
address, cache_entry.DataBlk);
- sequencer.writeCallback(address,
- GenericMachineType:L1Cache,
- cache_entry.DataBlk);
-
+ sequencer.writeCallback(address, cache_entry.DataBlk, false,
+ MachineType:L1Cache);
cache_entry.Dirty := true;
DPRINTF(RubySlicc, "%s\n", cache_entry.DataBlk);
}
@@ -1326,11 +1315,9 @@ machine(L1Cache, "Token protocol")
DPRINTF(RubySlicc, "Address: %s, Data Block: %s\n",
address, cache_entry.DataBlk);
peek(responseNetwork_in, ResponseMsg) {
-
- sequencer.writeCallback(address,
- getNondirectHitMachType(address, in_msg.Sender),
- cache_entry.DataBlk);
-
+ sequencer.writeCallback(address, cache_entry.DataBlk,
+ isExternalHit(address, in_msg.Sender),
+ machineIDToMachineType(in_msg.Sender));
}
cache_entry.Dirty := true;
DPRINTF(RubySlicc, "%s\n", cache_entry.DataBlk);