diff options
author | Nilay Vaish <nilay@cs.wisc.edu> | 2015-09-18 13:27:47 -0500 |
---|---|---|
committer | Nilay Vaish <nilay@cs.wisc.edu> | 2015-09-18 13:27:47 -0500 |
commit | 96c999fe88a5f600a1a5ddf8c15eadba3051508b (patch) | |
tree | b1fb5220ffcd3b0688d53cb7f41a6c016eadc0fa /src/mem/protocol/MOESI_CMP_token-L1cache.sm | |
parent | 216529bf182f58830cfccad090f348e1b8730675 (diff) | |
download | gem5-96c999fe88a5f600a1a5ddf8c15eadba3051508b.tar.xz |
ruby: print addresses in hex
Changeset 4872dbdea907 replaced Address by Addr, but did not make changes to
print statements. So the addresses which were being printed in hex earlier
along with their line address, were now being printed in decimals. This patch
adds a function printAddress(Addr) that can be used to print the address in hex
along with the lines address. This function has been put to use in some of the
places. At other places, change has been made to print just the address in
hex.
Diffstat (limited to 'src/mem/protocol/MOESI_CMP_token-L1cache.sm')
-rw-r--r-- | src/mem/protocol/MOESI_CMP_token-L1cache.sm | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/src/mem/protocol/MOESI_CMP_token-L1cache.sm b/src/mem/protocol/MOESI_CMP_token-L1cache.sm index dac2027b9..b8c2da761 100644 --- a/src/mem/protocol/MOESI_CMP_token-L1cache.sm +++ b/src/mem/protocol/MOESI_CMP_token-L1cache.sm @@ -1294,7 +1294,7 @@ machine(L1Cache, "Token protocol") action(h_load_hit, "hd", desc="Notify sequencer the load completed.") { assert(is_valid(cache_entry)); - DPRINTF(RubySlicc, "Address: %s, Data Block: %s\n", + DPRINTF(RubySlicc, "Address: %#x, Data Block: %s\n", address, cache_entry.DataBlk); L1Dcache.setMRU(cache_entry); @@ -1304,7 +1304,7 @@ machine(L1Cache, "Token protocol") action(h_ifetch_hit, "hi", desc="Notify sequencer the load completed.") { assert(is_valid(cache_entry)); - DPRINTF(RubySlicc, "Address: %s, Data Block: %s\n", + DPRINTF(RubySlicc, "Address: %#x, Data Block: %s\n", address, cache_entry.DataBlk); L1Icache.setMRU(cache_entry); @@ -1314,7 +1314,7 @@ machine(L1Cache, "Token protocol") action(x_external_load_hit, "x", desc="Notify sequencer the load completed.") { assert(is_valid(cache_entry)); - DPRINTF(RubySlicc, "Address: %s, Data Block: %s\n", + DPRINTF(RubySlicc, "Address: %#x, Data Block: %s\n", address, cache_entry.DataBlk); peek(responseNetwork_in, ResponseMsg) { L1Icache.setMRU(address); @@ -1327,7 +1327,7 @@ machine(L1Cache, "Token protocol") action(hh_store_hit, "\h", desc="Notify sequencer that store completed.") { assert(is_valid(cache_entry)); - DPRINTF(RubySlicc, "Address: %s, Data Block: %s\n", + DPRINTF(RubySlicc, "Address: %#x, Data Block: %s\n", address, cache_entry.DataBlk); L1Dcache.setMRU(cache_entry); @@ -1339,7 +1339,7 @@ machine(L1Cache, "Token protocol") action(xx_external_store_hit, "\x", desc="Notify sequencer that store completed.") { assert(is_valid(cache_entry)); - DPRINTF(RubySlicc, "Address: %s, Data Block: %s\n", + DPRINTF(RubySlicc, "Address: %#x, Data Block: %s\n", address, cache_entry.DataBlk); peek(responseNetwork_in, ResponseMsg) { L1Icache.setMRU(address); @@ -1424,7 +1424,7 @@ machine(L1Cache, "Token protocol") peek(responseNetwork_in, ResponseMsg) { assert(is_valid(cache_entry)); assert(in_msg.Tokens != 0); - DPRINTF(RubySlicc, "L1 received tokens for address: %s, tokens: %d\n", + DPRINTF(RubySlicc, "L1 received tokens for address: %#x, tokens: %d\n", in_msg.addr, in_msg.Tokens); cache_entry.Tokens := cache_entry.Tokens + in_msg.Tokens; DPRINTF(RubySlicc, "%d\n", cache_entry.Tokens); @@ -1544,7 +1544,7 @@ machine(L1Cache, "Token protocol") action(forward_eviction_to_cpu, "\cc", desc="sends eviction information to the processor") { if (send_evictions) { - DPRINTF(RubySlicc, "Sending invalidation for %s to the CPU\n", address); + DPRINTF(RubySlicc, "Sending invalidation for %#x to the CPU\n", address); sequencer.evictionCallback(address); } } |