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| author | Nikos Nikoleris <nikos.nikoleris@arm.com> | 2017-03-13 18:19:08 +0000 |
|---|---|---|
| committer | Nikos Nikoleris <nikos.nikoleris@arm.com> | 2017-06-13 15:52:32 +0000 |
| commit | 12db50c89584938839e035da47d206250cbfd7c2 (patch) | |
| tree | 831a4151b29cdc14958b8dab2cce97fc3136d7b6 /src/mem/protocol/MOESI_CMP_token-L2cache.sm | |
| parent | dd3fc1f996679f4cfd29f980d43a0652542e6d9b (diff) | |
| download | gem5-12db50c89584938839e035da47d206250cbfd7c2.tar.xz | |
ruby: Add support for address ranges in the directory
Previously the directory covered a flat address range that always
started from address 0. This change adds a vector of address ranges
with interleaving and hashing that each directory keeps track of and
the necessary flexibility to support systems with non continuous
memory ranges.
Change-Id: I6ea1c629bdf4c5137b7d9c89dbaf6c826adfd977
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/2903
Reviewed-by: Bradford Beckmann <brad.beckmann@amd.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Diffstat (limited to 'src/mem/protocol/MOESI_CMP_token-L2cache.sm')
| -rw-r--r-- | src/mem/protocol/MOESI_CMP_token-L2cache.sm | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/src/mem/protocol/MOESI_CMP_token-L2cache.sm b/src/mem/protocol/MOESI_CMP_token-L2cache.sm index c9995011d..7911179c2 100644 --- a/src/mem/protocol/MOESI_CMP_token-L2cache.sm +++ b/src/mem/protocol/MOESI_CMP_token-L2cache.sm @@ -152,6 +152,7 @@ machine(MachineType:L2Cache, "Token protocol") Tick clockEdge(); void set_cache_entry(AbstractCacheEntry b); void unset_cache_entry(); + MachineID mapAddressToMachine(Addr addr, MachineType mtype); Entry getCacheEntry(Addr address), return_by_pointer="yes" { Entry cache_entry := static_cast(Entry, "pointer", L2cache.lookup(address)); @@ -522,7 +523,7 @@ machine(MachineType:L2Cache, "Token protocol") //out_msg.Destination.addNetDest(getAllPertinentL2Banks(address)); //out_msg.Destination.remove(map_L1CacheMachId_to_L2Cache(address, in_msg.Requestor)); - out_msg.Destination.add(map_Address_to_Directory(address)); + out_msg.Destination.add(mapAddressToMachine(address, MachineType:Directory)); out_msg.MessageSize := MessageSizeType:Request_Control; out_msg.AccessMode := in_msg.AccessMode; out_msg.Prefetch := in_msg.Prefetch; @@ -541,7 +542,7 @@ machine(MachineType:L2Cache, "Token protocol") out_msg.addr := address; out_msg.Type := in_msg.Type; out_msg.Sender := machineID; - out_msg.Destination.add(map_Address_to_Directory(address)); + out_msg.Destination.add(mapAddressToMachine(address, MachineType:Directory)); out_msg.Tokens := in_msg.Tokens; out_msg.MessageSize := in_msg.MessageSize; out_msg.DataBlk := in_msg.DataBlk; @@ -557,7 +558,7 @@ machine(MachineType:L2Cache, "Token protocol") out_msg.addr := address; out_msg.Type := CoherenceResponseType:ACK; out_msg.Sender := machineID; - out_msg.Destination.add(map_Address_to_Directory(address)); + out_msg.Destination.add(mapAddressToMachine(address, MachineType:Directory)); out_msg.Tokens := cache_entry.Tokens; out_msg.MessageSize := MessageSizeType:Writeback_Control; } @@ -570,7 +571,7 @@ machine(MachineType:L2Cache, "Token protocol") enqueue(responseNetwork_out, ResponseMsg, l2_response_latency) { out_msg.addr := address; out_msg.Sender := machineID; - out_msg.Destination.add(map_Address_to_Directory(address)); + out_msg.Destination.add(mapAddressToMachine(address, MachineType:Directory)); out_msg.Tokens := cache_entry.Tokens; out_msg.DataBlk := cache_entry.DataBlk; out_msg.Dirty := cache_entry.Dirty; |