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authorNilay Vaish <nilay@cs.wisc.edu>2014-09-01 16:55:47 -0500
committerNilay Vaish <nilay@cs.wisc.edu>2014-09-01 16:55:47 -0500
commit7a0d5aafe4b845a2d1cff6210d7c6ee66e8aba61 (patch)
tree6ef6157a33d226688f2909998b71936976ee755b /src/mem/protocol/MOESI_CMP_token-L2cache.sm
parent00286fc5cbb7b8635d56eb335fed11d1499e2552 (diff)
downloadgem5-7a0d5aafe4b845a2d1cff6210d7c6ee66e8aba61.tar.xz
ruby: message buffers: significant changes
This patch is the final patch in a series of patches. The aim of the series is to make ruby more configurable than it was. More specifically, the connections between controllers are not at all possible (unless one is ready to make significant changes to the coherence protocol). Moreover the buffers themselves are magically connected to the network inside the slicc code. These connections are not part of the configuration file. This patch makes changes so that these connections will now be made in the python configuration files associated with the protocols. This requires each state machine to expose the message buffers it uses for input and output. So, the patch makes these buffers configurable members of the machines. The patch drops the slicc code that usd to connect these buffers to the network. Now these buffers are exposed to the python configuration system as Master and Slave ports. In the configuration files, any master port can be connected any slave port. The file pyobject.cc has been modified to take care of allocating the actual message buffer. This is inline with how other port connections work.
Diffstat (limited to 'src/mem/protocol/MOESI_CMP_token-L2cache.sm')
-rw-r--r--src/mem/protocol/MOESI_CMP_token-L2cache.sm49
1 files changed, 28 insertions, 21 deletions
diff --git a/src/mem/protocol/MOESI_CMP_token-L2cache.sm b/src/mem/protocol/MOESI_CMP_token-L2cache.sm
index f8bd01695..a2488066a 100644
--- a/src/mem/protocol/MOESI_CMP_token-L2cache.sm
+++ b/src/mem/protocol/MOESI_CMP_token-L2cache.sm
@@ -32,29 +32,36 @@ machine(L2Cache, "Token protocol")
Cycles l2_request_latency := 5;
Cycles l2_response_latency := 5;
bool filtering_enabled := "True";
-{
-
- // L2 BANK QUEUES
- // From local bank of L2 cache TO the network
-
- // this L2 bank -> a local L1 || mod-directory
- MessageBuffer responseFromL2Cache, network="To", virtual_network="4", ordered="false", vnet_type="response";
- // this L2 bank -> mod-directory
- MessageBuffer GlobalRequestFromL2Cache, network="To", virtual_network="2", ordered="false", vnet_type="request";
- // this L2 bank -> a local L1
- MessageBuffer L1RequestFromL2Cache, network="To", virtual_network="1", ordered="false", vnet_type="request";
+ // L2 BANK QUEUES
+ // From local bank of L2 cache TO the network
+
+ // this L2 bank -> a local L1 || mod-directory
+ MessageBuffer * responseFromL2Cache, network="To", virtual_network="4",
+ ordered="false", vnet_type="response";
+ // this L2 bank -> mod-directory
+ MessageBuffer * GlobalRequestFromL2Cache, network="To", virtual_network="2",
+ ordered="false", vnet_type="request";
+ // this L2 bank -> a local L1
+ MessageBuffer * L1RequestFromL2Cache, network="To", virtual_network="1",
+ ordered="false", vnet_type="request";
+
+
+ // FROM the network to this local bank of L2 cache
+
+ // a local L1 || mod-directory -> this L2 bank
+ MessageBuffer * responseToL2Cache, network="From", virtual_network="4",
+ ordered="false", vnet_type="response";
+ MessageBuffer * persistentToL2Cache, network="From", virtual_network="3",
+ ordered="true", vnet_type="persistent";
+ // mod-directory -> this L2 bank
+ MessageBuffer * GlobalRequestToL2Cache, network="From", virtual_network="2",
+ ordered="false", vnet_type="request";
+ // a local L1 -> this L2 bank
+ MessageBuffer * L1RequestToL2Cache, network="From", virtual_network="1",
+ ordered="false", vnet_type="request";
- // FROM the network to this local bank of L2 cache
-
- // a local L1 || mod-directory -> this L2 bank
- MessageBuffer responseToL2Cache, network="From", virtual_network="4", ordered="false", vnet_type="response";
- MessageBuffer persistentToL2Cache, network="From", virtual_network="3", ordered="true", vnet_type="persistent";
- // mod-directory -> this L2 bank
- MessageBuffer GlobalRequestToL2Cache, network="From", virtual_network="2", ordered="false", vnet_type="request";
- // a local L1 -> this L2 bank
- MessageBuffer L1RequestToL2Cache, network="From", virtual_network="1", ordered="false", vnet_type="request";
-
+{
// STATES
state_declaration(State, desc="L2 Cache states", default="L2Cache_State_I") {
// Base states