Ruby: Add support for functional accesses

This patch rpovides functional access support in Ruby. Currently only
the M5Port of RubyPort supports functional accesses. The support for
functional through the PioPort will be added as a separate patch.

1 files changed, 35 insertions, 27 deletions

diff --git a/src/mem/protocol/MOESI_hammer-dir.sm b/src/mem/protocol/MOESI_hammer-dir.sm
index 828c762cb..bb0a97ac4 100644
--- a/src/mem/protocol/MOESI_hammer-dir.sm
+++ b/src/mem/protocol/MOESI_hammer-dir.sm
@@ -59,38 +59,38 @@ machine(Directory, "AMD Hammer-like protocol")
   // STATES
   state_declaration(State, desc="Directory states", default="Directory_State_E") {
     // Base states
-    NX, AccessPermission:Invalid, desc="Not Owner, probe filter entry exists, block in O at Owner";
-    NO, AccessPermission:Invalid, desc="Not Owner, probe filter entry exists, block in E/M at Owner";
+    NX, AccessPermission:Maybe_Stale, desc="Not Owner, probe filter entry exists, block in O at Owner";
+    NO, AccessPermission:Maybe_Stale, desc="Not Owner, probe filter entry exists, block in E/M at Owner";
     S, AccessPermission:Read_Only, desc="Data clean, probe filter entry exists pointing to the current owner";
     O, AccessPermission:Read_Only, desc="Data clean, probe filter entry exists";
     E, AccessPermission:Read_Write, desc="Exclusive Owner, no probe filter entry";
 
     O_R, AccessPermission:Read_Only, desc="Was data Owner, replacing probe filter entry";
     S_R, AccessPermission:Read_Only, desc="Was Not Owner or Sharer, replacing probe filter entry";
-    NO_R, AccessPermission:Invalid, desc="Was Not Owner or Sharer, replacing probe filter entry";
-
-    NO_B, AccessPermission:Invalid, "NO^B", desc="Not Owner, Blocked";
-    NO_B_X, AccessPermission:Invalid, "NO^B", desc="Not Owner, Blocked, next queued request GETX";
-    NO_B_S, AccessPermission:Invalid, "NO^B", desc="Not Owner, Blocked, next queued request GETS";
-    NO_B_S_W, AccessPermission:Invalid, "NO^B", desc="Not Owner, Blocked, forwarded merged GETS, waiting for responses";
-    O_B, AccessPermission:Invalid, "O^B", desc="Owner, Blocked";
-    NO_B_W, AccessPermission:Invalid, desc="Not Owner, Blocked, waiting for Dram";
-    O_B_W, AccessPermission:Invalid, desc="Owner, Blocked, waiting for Dram";
-    NO_W, AccessPermission:Invalid, desc="Not Owner, waiting for Dram";
-    O_W, AccessPermission:Invalid, desc="Owner, waiting for Dram";
-    NO_DW_B_W, AccessPermission:Invalid, desc="Not Owner, Dma Write waiting for Dram and cache responses";
-    NO_DR_B_W, AccessPermission:Invalid, desc="Not Owner, Dma Read waiting for Dram and cache responses";
-    NO_DR_B_D, AccessPermission:Invalid, desc="Not Owner, Dma Read waiting for cache responses including dirty data";
-    NO_DR_B, AccessPermission:Invalid, desc="Not Owner, Dma Read waiting for cache responses";
-    NO_DW_W, AccessPermission:Invalid, desc="Not Owner, Dma Write waiting for Dram";
-    O_DR_B_W, AccessPermission:Invalid, desc="Owner, Dma Read waiting for Dram and cache responses";
-    O_DR_B, AccessPermission:Invalid, desc="Owner, Dma Read waiting for cache responses";
-    WB, AccessPermission:Invalid, desc="Blocked on a writeback";
-    WB_O_W, AccessPermission:Invalid, desc="Blocked on memory write, will go to O";
-    WB_E_W, AccessPermission:Invalid, desc="Blocked on memory write, will go to E";
-
-    NO_F,  AccessPermission:Invalid, desc="Blocked on a flush";
-    NO_F_W, AccessPermission:Invalid, desc="Not Owner, Blocked, waiting for Dram";
+    NO_R, AccessPermission:Busy, desc="Was Not Owner or Sharer, replacing probe filter entry";
+
+    NO_B, AccessPermission:Busy, "NO^B", desc="Not Owner, Blocked";
+    NO_B_X, AccessPermission:Busy, "NO^B", desc="Not Owner, Blocked, next queued request GETX";
+    NO_B_S, AccessPermission:Busy, "NO^B", desc="Not Owner, Blocked, next queued request GETS";
+    NO_B_S_W, AccessPermission:Busy, "NO^B", desc="Not Owner, Blocked, forwarded merged GETS, waiting for responses";
+    O_B, AccessPermission:Busy, "O^B", desc="Owner, Blocked";
+    NO_B_W, AccessPermission:Busy, desc="Not Owner, Blocked, waiting for Dram";
+    O_B_W, AccessPermission:Busy, desc="Owner, Blocked, waiting for Dram";
+    NO_W, AccessPermission:Busy, desc="Not Owner, waiting for Dram";
+    O_W, AccessPermission:Busy, desc="Owner, waiting for Dram";
+    NO_DW_B_W, AccessPermission:Busy, desc="Not Owner, Dma Write waiting for Dram and cache responses";
+    NO_DR_B_W, AccessPermission:Busy, desc="Not Owner, Dma Read waiting for Dram and cache responses";
+    NO_DR_B_D, AccessPermission:Busy, desc="Not Owner, Dma Read waiting for cache responses including dirty data";
+    NO_DR_B, AccessPermission:Busy, desc="Not Owner, Dma Read waiting for cache responses";
+    NO_DW_W, AccessPermission:Busy, desc="Not Owner, Dma Write waiting for Dram";
+    O_DR_B_W, AccessPermission:Busy, desc="Owner, Dma Read waiting for Dram and cache responses";
+    O_DR_B, AccessPermission:Busy, desc="Owner, Dma Read waiting for cache responses";
+    WB, AccessPermission:Busy, desc="Blocked on a writeback";
+    WB_O_W, AccessPermission:Busy, desc="Blocked on memory write, will go to O";
+    WB_E_W, AccessPermission:Busy, desc="Blocked on memory write, will go to E";
+
+    NO_F,  AccessPermission:Busy, desc="Blocked on a flush";
+    NO_F_W, AccessPermission:Busy, desc="Not Owner, Blocked, waiting for Dram";
   }
 
   // Events
@@ -190,6 +190,10 @@ machine(Directory, "AMD Hammer-like protocol")
     return static_cast(Entry, directory[addr]);
   }
 
+  DataBlock getDataBlock(Address addr), return_by_ref="yes" {
+    return getDirectoryEntry(addr).DataBlk;
+  }
+
   PfEntry getProbeFilterEntry(Address addr), return_by_pointer="yes" {
     if (probe_filter_enabled || full_bit_dir_enabled) {
       PfEntry pfEntry := static_cast(PfEntry, "pointer", probeFilter.lookup(addr));
@@ -239,7 +243,11 @@ machine(Directory, "AMD Hammer-like protocol")
       return Directory_State_to_permission(tbe.TBEState);
     }
 
-    return Directory_State_to_permission(getDirectoryEntry(addr).DirectoryState);
+    if(directory.isPresent(addr)) {
+      return Directory_State_to_permission(getDirectoryEntry(addr).DirectoryState);
+    }
+
+    return AccessPermission:NotPresent;
   }
 
   void setAccessPermission(PfEntry pf_entry, Address addr, State state) {