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| author | Steve Reinhardt <steve.reinhardt@amd.com> | 2010-01-29 20:29:17 -0800 |
|---|---|---|
| committer | Steve Reinhardt <steve.reinhardt@amd.com> | 2010-01-29 20:29:17 -0800 |
| commit | c6f1d959be74de55b0c90f3c961314791342d03e (patch) | |
| tree | d0ef0777894828291a6ced188c8bcae323cea442 /src/mem/protocol/MOESI_hammer-dma.sm | |
| parent | 98c94cfe3ce83634f3bad79ca18263f42e36ca6a (diff) | |
| download | gem5-c6f1d959be74de55b0c90f3c961314791342d03e.tar.xz | |
ruby: Make SLICC-generated objects SimObjects.
Also add SLICC support for state-machine parameter defaults
(passed through to Python as SimObject Param defaults).
Diffstat (limited to 'src/mem/protocol/MOESI_hammer-dma.sm')
| -rw-r--r-- | src/mem/protocol/MOESI_hammer-dma.sm | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mem/protocol/MOESI_hammer-dma.sm b/src/mem/protocol/MOESI_hammer-dma.sm index b217923a4..079485a05 100644 --- a/src/mem/protocol/MOESI_hammer-dma.sm +++ b/src/mem/protocol/MOESI_hammer-dma.sm @@ -28,7 +28,7 @@ machine(DMA, "DMA Controller") -: int request_latency +: int request_latency = 6 { MessageBuffer responseFromDir, network="From", virtual_network="4", ordered="true", no_vector="true"; |