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authorNilay Vaish ext:(%2C%20Malek%20Musleh%20%3Cmalek.musleh%40gmail.com%3E) <nilay@cs.wisc.edu>2013-05-21 11:31:31 -0500
committerNilay Vaish ext:(%2C%20Malek%20Musleh%20%3Cmalek.musleh%40gmail.com%3E) <nilay@cs.wisc.edu>2013-05-21 11:31:31 -0500
commit59a7abff29aa5a687e1693f003c20d7e2000c40a (patch)
treee1cf2cf822cf5b1002a6b72d8d613f65e0e1df8d /src/mem/protocol/RubySlicc_Exports.sm
parentd3c33d91b68e917478dba48c03a674b21ebd2747 (diff)
downloadgem5-59a7abff29aa5a687e1693f003c20d7e2000c40a.tar.xz
ruby: add stats to .sm files, remove cache profiler
This patch changes the way cache statistics are collected in ruby. As of now, there is separate entity called CacheProfiler which holds statistical variables for caches. The CacheMemory class defines different functions for accessing the CacheProfiler. These functions are then invoked in the .sm files. I find this approach opaque and prone to error. Secondly, we probably should not be paying the cost of a function call for recording statistics. Instead, this patch allows for accessing statistical variables in the .sm files. The collection would become transparent. Secondly, it would happen in place, so no function calls. The patch also removes the CacheProfiler class. --HG-- rename : src/mem/slicc/ast/InfixOperatorExprAST.py => src/mem/slicc/ast/OperatorExprAST.py
Diffstat (limited to 'src/mem/protocol/RubySlicc_Exports.sm')
-rw-r--r--src/mem/protocol/RubySlicc_Exports.sm33
1 files changed, 0 insertions, 33 deletions
diff --git a/src/mem/protocol/RubySlicc_Exports.sm b/src/mem/protocol/RubySlicc_Exports.sm
index 036419095..015ae8cb3 100644
--- a/src/mem/protocol/RubySlicc_Exports.sm
+++ b/src/mem/protocol/RubySlicc_Exports.sm
@@ -144,39 +144,6 @@ enumeration(SequencerRequestType, desc="...", default="SequencerRequestType_NULL
NULL, desc="Invalid request type";
}
-enumeration(GenericRequestType, desc="...", default="GenericRequestType_NULL") {
- GETS, desc="gets request";
- GET_INSTR, desc="get instr request";
- GETX, desc="getx request";
- UPGRADE, desc="upgrade request";
- DOWNGRADE, desc="downgrade request";
- INV, desc="invalidate request";
- INV_S, desc="invalidate shared copy request";
- PUTS, desc="puts request";
- PUTO, desc="puto request";
- PUTX, desc="putx request";
- L2_PF, desc="L2 prefetch";
- LD, desc="Load";
- ST, desc="Store";
- ATOMIC, desc="Atomic Load/Store";
- IFETCH, desc="Instruction fetch";
- IO, desc="I/O";
- NACK, desc="Nack";
- REPLACEMENT, desc="Replacement";
- WB_ACK, desc="WriteBack ack";
- EXE_ACK, desc="Execlusive ack";
- COMMIT, desc="Commit version";
- LD_XACT, desc="Transactional Load";
- LDX_XACT, desc="Transactional Load-Intend-Modify";
- ST_XACT, desc="Transactional Store";
- BEGIN_XACT, desc="Begin Transaction";
- COMMIT_XACT, desc="Commit Transaction";
- ABORT_XACT, desc="Abort Transaction";
- DMA_READ, desc="DMA READ";
- DMA_WRITE, desc="DMA WRITE";
- NULL, desc="null request type";
-}
-
enumeration(CacheRequestType, desc="...", default="CacheRequestType_NULL") {
DataArrayRead, desc="Read access to the cache's data array";
DataArrayWrite, desc="Write access to the cache's data array";