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| author | David Hashe <david.hashe@amd.com> | 2015-07-20 09:15:18 -0500 |
|---|---|---|
| committer | David Hashe <david.hashe@amd.com> | 2015-07-20 09:15:18 -0500 |
| commit | 21aa5734a0f2c03263e26c66e5cd95ad64c70697 (patch) | |
| tree | 43cf18ec392aea120c025bf818a0ce30efab201c /src/mem/protocol/RubySlicc_Types.sm | |
| parent | 63a9f10de80a2a117aa06858e65dee2b6654762f (diff) | |
| download | gem5-21aa5734a0f2c03263e26c66e5cd95ad64c70697.tar.xz | |
ruby: fix deadlock bug in banked array resource checks
The Ruby banked array resource checks (initiated from SLICC) did a check and
allocate at the same time. If a transition needs more than one resource, then
it might check/allocate resource #1, then fail to get resource #2. Another
transition might then try to get the same resources, but in reverse order.
Deadlock.
This patch separates resource checking and resource reservation into two
steps to avoid deadlock.
Diffstat (limited to 'src/mem/protocol/RubySlicc_Types.sm')
| -rw-r--r-- | src/mem/protocol/RubySlicc_Types.sm | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mem/protocol/RubySlicc_Types.sm b/src/mem/protocol/RubySlicc_Types.sm index 6c3c4168d..11159fd6c 100644 --- a/src/mem/protocol/RubySlicc_Types.sm +++ b/src/mem/protocol/RubySlicc_Types.sm @@ -154,7 +154,7 @@ structure (CacheMemory, external = "yes") { Cycles getTagLatency(); Cycles getDataLatency(); void setMRU(Address); - void recordRequestType(CacheRequestType); + void recordRequestType(CacheRequestType, Address); bool checkResourceAvailable(CacheResourceType, Address); int getCacheSize(); |