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| author | Iru Cai <mytbk920423@gmail.com> | 2019-02-28 17:07:16 +0800 |
|---|---|---|
| committer | Iru Cai <mytbk920423@gmail.com> | 2019-03-18 15:11:44 +0800 |
| commit | ce003b28a15104574bed634923564a6bd910898d (patch) | |
| tree | d4ac3b5be20f0354e717a4854f981d4a4c21065b /src/mem/protocol/RubySlicc_Types.sm | |
| parent | 4cc9473c971650153d148b74ad67e50e54828a99 (diff) | |
| download | gem5-ce003b28a15104574bed634923564a6bd910898d.tar.xz | |
invisispec-1.0 source
Diffstat (limited to 'src/mem/protocol/RubySlicc_Types.sm')
| -rw-r--r-- | src/mem/protocol/RubySlicc_Types.sm | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/mem/protocol/RubySlicc_Types.sm b/src/mem/protocol/RubySlicc_Types.sm index 27a045d29..5c73b4320 100644 --- a/src/mem/protocol/RubySlicc_Types.sm +++ b/src/mem/protocol/RubySlicc_Types.sm @@ -113,7 +113,7 @@ structure (Sequencer, external = "yes") { Cycles, Cycles, Cycles); void checkCoherence(Addr); - void evictionCallback(Addr); + void evictionCallback(Addr, bool); void recordRequestType(SequencerRequestType); bool checkResourceAvailable(CacheResourceType, Addr); void invalidateSC(Addr); @@ -172,6 +172,7 @@ structure(RubyRequest, desc="...", interface="Message", external="yes") { HSAScope scope, desc="HSA scope"; HSASegment segment, desc="HSA segment"; PacketPtr pkt, desc="Packet associated with this request"; + int idx, desc="LQ index"; } structure(AbstractEntry, primitive="yes", external = "yes") { |