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| author | Brad Beckmann <Brad.Beckmann@amd.com> | 2010-01-29 20:29:19 -0800 |
|---|---|---|
| committer | Brad Beckmann <Brad.Beckmann@amd.com> | 2010-01-29 20:29:19 -0800 |
| commit | 2a0555470cfc66ab70544e97578c048822ec9282 (patch) | |
| tree | 6f96f3fb5bf9f27b0c2c9032715907fa7939bc49 /src/mem/protocol/RubySlicc_Types.sm | |
| parent | 3b290a35aca3f6aba8226dde8387f38a9de39093 (diff) | |
| download | gem5-2a0555470cfc66ab70544e97578c048822ec9282.tar.xz | |
ruby: Converted MOESI_hammer dma cntrl to new config system
Diffstat (limited to 'src/mem/protocol/RubySlicc_Types.sm')
| -rw-r--r-- | src/mem/protocol/RubySlicc_Types.sm | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/mem/protocol/RubySlicc_Types.sm b/src/mem/protocol/RubySlicc_Types.sm index 386ae2ee1..10e3711c5 100644 --- a/src/mem/protocol/RubySlicc_Types.sm +++ b/src/mem/protocol/RubySlicc_Types.sm @@ -122,6 +122,11 @@ external_type(MemoryControl, inport="yes", outport="yes") { } +external_type(DMASequencer) { + void ackCallback(); + void dataCallback(DataBlock); +} + external_type(TimerTable, inport="yes") { bool isReady(); Address readyAddress(); |