ruby: message buffer: drop dequeue_getDelayCycles()

The functionality of updating and returning the delay cycles would now be
performed by the dequeue() function itself.

6 files changed, 16 insertions, 15 deletions

diff --git a/src/mem/protocol/MESI_Three_Level-L0cache.sm b/src/mem/protocol/MESI_Three_Level-L0cache.sm
index fd1b85e0d..47a41b83a 100644
--- a/src/mem/protocol/MESI_Three_Level-L0cache.sm
+++ b/src/mem/protocol/MESI_Three_Level-L0cache.sm
@@ -474,12 +474,12 @@ machine(L0Cache, "MESI Directory L0 Cache")
 
   action(l_popRequestQueue, "l",
          desc="Pop incoming request queue and profile the delay within this virtual network") {
-    profileMsgDelay(2, messgeBuffer_in.dequeue_getDelayCycles());
+    profileMsgDelay(2, messgeBuffer_in.dequeue());
   }
 
   action(o_popIncomingResponseQueue, "o",
          desc="Pop Incoming Response queue and profile the delay within this virtual network") {
-    profileMsgDelay(1, messgeBuffer_in.dequeue_getDelayCycles());
+    profileMsgDelay(1, messgeBuffer_in.dequeue());
   }
 
   action(s_deallocateTBE, "s", desc="Deallocate TBE") {
diff --git a/src/mem/protocol/MESI_Three_Level-L1cache.sm b/src/mem/protocol/MESI_Three_Level-L1cache.sm
index 43a9a49cf..36068dbac 100644
--- a/src/mem/protocol/MESI_Three_Level-L1cache.sm
+++ b/src/mem/protocol/MESI_Three_Level-L1cache.sm
@@ -640,12 +640,12 @@ machine(L1Cache, "MESI Directory L1 Cache CMP")
 
   action(l_popL2RequestQueue, "l",
          desc="Pop incoming request queue and profile the delay within this virtual network") {
-    profileMsgDelay(2, requestNetwork_in.dequeue_getDelayCycles());
+    profileMsgDelay(2, requestNetwork_in.dequeue());
   }
 
   action(o_popL2ResponseQueue, "o",
          desc="Pop Incoming Response queue and profile the delay within this virtual network") {
-    profileMsgDelay(1, responseNetwork_in.dequeue_getDelayCycles());
+    profileMsgDelay(1, responseNetwork_in.dequeue());
   }
 
   action(s_deallocateTBE, "s", desc="Deallocate TBE") {
diff --git a/src/mem/protocol/MESI_Two_Level-L1cache.sm b/src/mem/protocol/MESI_Two_Level-L1cache.sm
index 5ccd453bf..a202a8deb 100644
--- a/src/mem/protocol/MESI_Two_Level-L1cache.sm
+++ b/src/mem/protocol/MESI_Two_Level-L1cache.sm
@@ -833,12 +833,14 @@ machine(L1Cache, "MESI Directory L1 Cache CMP")
     mandatoryQueue_in.dequeue();
   }
 
-  action(l_popRequestQueue, "l", desc="Pop incoming request queue and profile the delay within this virtual network") {
-    profileMsgDelay(2, requestL1Network_in.dequeue_getDelayCycles());
+  action(l_popRequestQueue, "l",
+    desc="Pop incoming request queue and profile the delay within this virtual network") {
+    profileMsgDelay(2, requestL1Network_in.dequeue());
   }
 
-  action(o_popIncomingResponseQueue, "o", desc="Pop Incoming Response queue and profile the delay within this virtual network") {
-    profileMsgDelay(1, responseL1Network_in.dequeue_getDelayCycles());
+  action(o_popIncomingResponseQueue, "o",
+    desc="Pop Incoming Response queue and profile the delay within this virtual network") {
+    profileMsgDelay(1, responseL1Network_in.dequeue());
   }
 
   action(s_deallocateTBE, "s", desc="Deallocate TBE") {
diff --git a/src/mem/protocol/MESI_Two_Level-L2cache.sm b/src/mem/protocol/MESI_Two_Level-L2cache.sm
index 7cd5560fc..f69eaa9a9 100644
--- a/src/mem/protocol/MESI_Two_Level-L2cache.sm
+++ b/src/mem/protocol/MESI_Two_Level-L2cache.sm
@@ -590,15 +590,15 @@ machine(L2Cache, "MESI Directory L2 Cache CMP")
   }
 
   action(jj_popL1RequestQueue, "\j", desc="Pop incoming L1 request queue") {
-    profileMsgDelay(0, L1RequestL2Network_in.dequeue_getDelayCycles());
+    profileMsgDelay(0, L1RequestL2Network_in.dequeue());
   }
 
   action(k_popUnblockQueue, "k", desc="Pop incoming unblock queue") {
-    profileMsgDelay(0, L1unblockNetwork_in.dequeue_getDelayCycles());
+    profileMsgDelay(0, L1unblockNetwork_in.dequeue());
   }
 
   action(o_popIncomingResponseQueue, "o", desc="Pop Incoming Response queue") {
-    profileMsgDelay(1, responseL2Network_in.dequeue_getDelayCycles());
+    profileMsgDelay(1, responseL2Network_in.dequeue());
   }
 
   action(m_writeDataToCache, "m", desc="Write data from response queue to cache") {
diff --git a/src/mem/protocol/MI_example-cache.sm b/src/mem/protocol/MI_example-cache.sm
index 29cf8d482..561de2397 100644
--- a/src/mem/protocol/MI_example-cache.sm
+++ b/src/mem/protocol/MI_example-cache.sm
@@ -317,11 +317,11 @@ machine(L1Cache, "MI Example L1 Cache")
   }
 
   action(n_popResponseQueue, "n", desc="Pop the response queue") {
-    profileMsgDelay(1, responseNetwork_in.dequeue_getDelayCycles());
+    profileMsgDelay(1, responseNetwork_in.dequeue());
   }
 
   action(o_popForwardedRequestQueue, "o", desc="Pop the forwarded request queue") {
-    profileMsgDelay(2, forwardRequestNetwork_in.dequeue_getDelayCycles());
+    profileMsgDelay(2, forwardRequestNetwork_in.dequeue());
   }
 
   action(p_profileMiss, "pi", desc="Profile cache miss") {
diff --git a/src/mem/protocol/RubySlicc_Types.sm b/src/mem/protocol/RubySlicc_Types.sm
index a601b2cfc..789595dbe 100644
--- a/src/mem/protocol/RubySlicc_Types.sm
+++ b/src/mem/protocol/RubySlicc_Types.sm
@@ -41,8 +41,7 @@ external_type(Scalar, primitive="yes");
 
 structure(InPort, external = "yes", primitive="yes") {
   bool isReady();
-  void dequeue();
-  Cycles dequeue_getDelayCycles();
+  Cycles dequeue();
   void recycle();
   bool isEmpty();
 }